Crypto Device Drivers Release 20.08.0 Aug 08, 2020 CONTENTS 1 Crypto Device Supported Functionality Matrices1 1.1 Supported Feature Flags..................................2 1.2 Supported Cipher Algorithms...............................5 1.3 Supported Authentication Algorithms...........................7 1.4 Supported AEAD Algorithms...............................8 1.5 Supported Asymmetric Algorithms............................9 2 AESN-NI Multi Buffer Crypto Poll Mode Driver 10 2.1 Features........................................... 10 2.2 Limitations......................................... 11 2.3 Installation......................................... 11 2.4 Initialization........................................ 12 2.5 Extra notes......................................... 12 3 AES-NI GCM Crypto Poll Mode Driver 14 3.1 Features........................................... 14 3.2 Limitations......................................... 14 3.3 Installation......................................... 14 3.4 Initialization........................................ 15 4 ARMv8 Crypto Poll Mode Driver 16 4.1 Features........................................... 16 4.2 Installation......................................... 16 4.3 Initialization........................................ 17 4.4 Limitations......................................... 17 5 NXP CAAM JOB RING (caam_jr) 18 5.1 Architecture........................................ 18 5.2 Implementation....................................... 18 5.3 Features........................................... 18 5.4 Supported DPAA SoCs................................... 19 5.5 Limitations......................................... 19 5.6 Prerequisites........................................ 19 5.7 Pre-Installation Configuration............................... 20 5.8 Installations......................................... 20 5.9 Enabling logs........................................ 20 6 AMD CCP Poll Mode Driver 21 6.1 Features........................................... 21 6.2 Installation......................................... 22 i 6.3 Initialization........................................ 22 6.4 Limitations......................................... 23 7 NXP DPAA2 CAAM (DPAA2_SEC) 24 7.1 Architecture........................................ 24 7.2 Implementation....................................... 24 7.3 Features........................................... 25 7.4 Supported DPAA2 SoCs.................................. 26 7.5 Whitelisting & Blacklisting................................ 26 7.6 Limitations......................................... 26 7.7 Prerequisites........................................ 26 7.8 Pre-Installation Configuration............................... 27 7.9 Installations......................................... 27 7.10 Enabling logs........................................ 27 8 NXP DPAA CAAM (DPAA_SEC) 28 8.1 Architecture........................................ 28 8.2 Implementation....................................... 28 8.3 Features........................................... 28 8.4 Supported DPAA SoCs................................... 29 8.5 Whitelisting & Blacklisting................................ 29 8.6 Limitations......................................... 29 8.7 Prerequisites........................................ 30 8.8 Pre-Installation Configuration............................... 30 8.9 Installations......................................... 30 8.10 Enabling logs........................................ 30 9 KASUMI Crypto Poll Mode Driver 31 9.1 Features........................................... 31 9.2 Limitations......................................... 31 9.3 Installation......................................... 31 9.4 Initialization........................................ 32 9.5 Extra notes on KASUMI F9................................ 33 10 Cavium OCTEON TX Crypto Poll Mode Driver 34 10.1 Supported Symmetric Crypto Algorithms......................... 34 10.2 Supported Asymmetric Crypto Algorithms........................ 35 10.3 Config flags......................................... 35 10.4 Compilation........................................ 35 10.5 Execution.......................................... 36 10.6 Testing........................................... 36 11 Marvell OCTEON TX2 Crypto Poll Mode Driver 37 11.1 Features........................................... 37 11.2 Installation......................................... 38 11.3 Initialization........................................ 38 11.4 Debugging Options..................................... 39 11.5 Testing........................................... 39 11.6 Lookaside IPsec Support.................................. 39 12 OpenSSL Crypto Poll Mode Driver 41 12.1 Features........................................... 41 ii 12.2 Installation......................................... 42 12.3 Initialization........................................ 42 12.4 Limitations......................................... 43 13 MVSAM Crypto Poll Mode Driver 44 13.1 Features........................................... 44 13.2 Limitations......................................... 45 13.3 Installation......................................... 45 13.4 Initialization........................................ 45 14 Marvell NITROX Crypto Poll Mode Driver 47 14.1 Features........................................... 47 14.2 Limitations......................................... 47 14.3 Installation......................................... 47 14.4 Initialization........................................ 48 15 Null Crypto Poll Mode Driver 49 15.1 Features........................................... 49 15.2 Limitations......................................... 49 15.3 Installation......................................... 49 15.4 Initialization........................................ 50 16 Cryptodev Scheduler Poll Mode Driver Library 51 16.1 Limitations......................................... 51 16.2 Installation......................................... 52 16.3 Initialization........................................ 52 16.4 Cryptodev Scheduler Modes Overview.......................... 52 17 SNOW 3G Crypto Poll Mode Driver 55 17.1 Features........................................... 55 17.2 Limitations......................................... 55 17.3 Installation......................................... 55 17.4 Initialization........................................ 56 18 Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver 57 18.1 Symmetric Crypto Service on QAT............................ 57 18.2 Asymmetric Crypto Service on QAT........................... 60 18.3 Building PMDs on QAT.................................. 60 19 Virtio Crypto Poll Mode Driver 69 19.1 Features........................................... 69 19.2 Limitations......................................... 69 19.3 Virtio crypto PMD Rx/Tx Callbacks............................ 69 19.4 Installation......................................... 70 19.5 Tests............................................ 70 20 ZUC Crypto Poll Mode Driver 71 20.1 Features........................................... 71 20.2 Limitations......................................... 71 20.3 Installation......................................... 71 20.4 Initialization........................................ 72 iii 1 Crypto Device Drivers, Release 20.08.0 CHAPTER ONE CRYPTO DEVICE SUPPORTED FUNCTIONALITY MATRICES 1.1 Supported Feature Flags Table 1.1: Features availability in crypto drivers Fea- a a a c c d d k m n n o o o q s v z ture e e r a c p p a v i t u c c t p a n i r u s s m a p a a s s r l l t e e t o t i c n i n i v m a a u a o e o n w o _ _ 8 _ 2 _ m m x o n t s 3 g m j r _ s i n x s g c b s e t 2 l m e c x c Sym- Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y met- ric crypto Asym- Y Y Y met- ric crypto Sym Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y op- era- tion chain- ing HW Y Y Y Y Y Y Y Y Y Ac- cel- er- ated Pro- Y Y Y Y Y Y to- col of- fload CPU Y Y SSE CPU Y Y 1.1.AVX Supported Feature Flags 2 CPU Y Y AVX2 CPU Y Y AVX512 CPU Y Y AESNI CPU Y NEON CPU Y ARM CE In Y Y Y Y Y Y Y Y Y Y Place SGL OOP Y Y Y Y Y Y Y SGL In SGL Out OOP Y Y Y Y Y Y Y Y Y Y SGL In LB Out OOP Y Y Y Y Y LB In SGL Out OOP Y Y Y Y Y Y Y Y Y Y Y Y Y LB In LB Out RSA Y Y PRIV OP KEY EXP RSA Y Y Y Y PRIV OP KEY QT Di- Y gest en- crypted Asym- Y met- ric ses- sion- less CPU Y Y crypto Sym- Y Y Y Y Y Y Y Y Y Y met- ric ses- sion- less Non- Y Y Y Byte aligned data Crypto Device Drivers, Release 20.08.0 Note: • “In Place SGL” feature flag stands for “In place Scatter-gather list”, which means that an input buffer can consist of multiple segments, being the operation in-place (input address = output address). • “OOP SGL In SGL Out” feature flag stands for “Out-of-place Scatter-gather list Input, Scatter- gather list Output”, which means pmd supports different scatter-gather styled input and output buffers (i.e. both can consists of multiple segments). • “OOP SGL In LB Out” feature flag stands for “Out-of-place Scatter-gather list Input, Linear Buffers Output”, which means PMD supports input from scatter-gathered styled buffers, out- putting linear buffers (i.e. single segment). • “OOP LB In SGL Out” feature flag stands for “Out-of-place Linear Buffers Input, Scatter-gather list Output”, which means PMD supports input from linear buffer, outputting scatter-gathered styled buffers. • “OOP LB In LB Out” feature flag stands for “Out-of-place Linear Buffers Input, Linear Buffers Output”, which means that Out-of-place operation is supported, with linear input and output buffers. • “RSA PRIV OP KEY EXP”