FM Demodulation Techniques & PLL Updated: 4/26/15 Sections: 4-11 to 4-15 Outline • FM Demodulation Techniques FM Demodulator Classification • Coherent & Non-coherent – A coherent detector has two inputs—one for a reference signal, such as the synchronized oscillator signal, and one for the modulated signal that is to be demodulated. – A noncoherent detector has only one input, namely, the modulated signal port. – Example: The envelope detector is an example of a noncoherent detector. • Demodulator Classification – Frequency Discrimination • Noncoherent demodulator • FMàAMàEDàm(t) – Phase Shift Discrimination • Noncoherent demodulator • FMàPMàm(t) – Phase-Locked Loop (PLL) Detector • Coherent demodulator Let’s look at each! • Superior performance; complex and expensive Frequency Discrimination • Components – Bandpass Limiter: Consists of Hard Limiter & BP Filter – Discriminator (frequency discriminator gain: KFD V/rad - assume unity) – Envelope Detector Note: Df=Kf Freq. deviation sensitivity THE OUTPUT WILL BE: DC Component can be blocked by an AC coupled circuit Frequency Discrimination - Discriminator • How the discriminator operates: – Generally, has a gain of KFD V/rad – In freq. domain: H(w) = jw KFD – In time domain: v2(t) d[v1(t)]/dt Frequency Discrimination FM Wave Output of Tuned Circuit (discriminator) Frequency Discrimination – Slope Detector • In practice the differentiator can be approximated by a slope detector that has a linear frequency-to-amplitude transfer characteristic over the bandwidth BW –One drawback is that it is narrow band Tuned Circuit BT is Carson’s BW Frequency Discrimination – Slope Detector Transfer Output Curve Slope Detector Transfer Characteristics Frequency Discrimination – Slope Detector • Major Limitations: – It is inefficient, as it is linear in very limited frequency range. – It reacts to all amplitude changes (needs a limiter). – It is relatively difficult to tune, as tuned circuit must be tuned to different frequency than carrier frequency. Transfer Curve Frequency Discrim. – Balanced Slope Detector Envelope Detector • Also called balanced discriminator • Uses two tuned circuits each set to a D1 fixed frequency T’: fc+ΔF – f1 = 3ΔF + fc & f2 = 3ΔF – fc • The center-tapped transformer feeds the tuned circuits – Tuned circuits are 180 degrees out of phase • When fi>fcà Then output of T’(+Ve) > output of T’’ (-Ve) à max voltage across D1 (net voltage positive) T’’: Fc-ΔF • When fi<fcà Then output of T’(+Ve) < D2 output of T’’ (-Ve) à max voltage across D2 (net voltage negative) • When f=fcà voltage across D1=D2 (the net voltage will be zero) Frequency Discrim. – Balanced Slope Detector • Uses two tuned circuits each set to a fixed frequency – f1 = 3ΔF + fc & f2 = 3ΔF - fc 90 Degree out of phase K1 and K2 are constant depending on values of the After the series capacitors and Limiter parallel resonant circuits Balanced Slope Detector - Transfer Curve Major Advantage: Larger Range We still like to pull it to +/-δf ! Useful Range Phase Shift Discriminator – Quadrature Detector • Very common in TV receivers • It uses a phase shift circuit • It converts the instantaneous frequency deviation in an FM signal to phase shift and then detects the changes of phase – Cs results in -90 deg. Shift – The tuned circuità additional phase shift proportional to instantaneous frequency deviation from fc Another approach Balanced zero-crossing FM detector • This is a hybridFree-running circuit fc Linear frequency-to-voltage PW changes – Analog and digital combination Characteristic: C[fi(t) – fc] For the case of FM: fi(t) = (1/2p)Df m(t) IF fi > fc à Tc>Ti Qdc > Qdc à Vout > 0 IF fi < fc à Tc<Ti Qdc < Qdc à Vout < 0 Phase-Locked Loops • Applications: Frequency synthesizer, TV, Demodulators, clock recovery circuits, multipliers, etc. • Basic Idea: A negative feedback control system • Basic Components: PD, Loop Filter (LPF), VCO • Types: Analog / Digital • Operation: when it is locked it will track the input frequency: wout=win Mixer Basic Operation Km • as Kv - Coherent demodulator - Out of phase 90 deg. Km V1(t) = Km Vin(t).Vo(t) Vin(t) V1(t) Km is the gain of the multiplier Vo(t) PLL Characteristics http://www2.ensc.sfu.ca/people/faculty/ho/ENSC327/Pre_13_PLL.pdf Analog PLL When locked, that is when no phase error à exactly 90 deg. Diff (90 deg. out of phase) Phase detector constant gain V/rad Vp = KmAiAo/2=Kd Analog PLL Locked in frequency Analog PLL – Linear Model (Transfer Function) Phase Detector Phase Detector Gain Open loop transfer function: G(f) = Kv Kd F(f)/jw G(f) Vo(t) VCO Gain Analog PLL – Linear Model (Transfer Function) Phase Detector Open loop transfer function: G(f) = Kv Kd F(f)/jw Loop Gain: Kd Kv G(f) Thus: Θin ( f )− Θo ( f ) = Θe ( f ) G( f )+1 Θ ( f ) = Θ ( f )⋅G( f ) → Θ ( f ) = Θ ( f ) Loop Gain: Kd Kv o e in o G( f ) Θ ( f ) G( f ) K ⋅ K ⋅ F( f ) / jω K ⋅ K ⋅ F( f ) H( f ) = o = = d v = d v Θi ( f ) G( f )+1 1+ Kd ⋅ Kv ⋅ F( f ) / jω jω + Kd ⋅ Kv ⋅ F( f ) Remember: G(f) is Open loop transfer function Analog PLL – Linear Model (Phase Error Function) Phase Error Θe ( f ) Θin ( f )− Θo ( f ) Θo ( f ) He ( f ) = = =1− =1− H( f ) Transfer Function Θi ( f ) Θi ( f ) Θi ( f ) jω He ( f ) = jω + Kd ⋅ Kv ⋅ F( f ) → Θe ( f ) = He ( f )⋅Θi ( f ) What is the steady-state error? We use Final Value Theorem of the Laplace Transform Θe (∞) = lims→0 sΘe (s);s = jω Note that ideally we want this s2 Θ (∞) = lim Θ (s)⋅ to be zero – this has to do with e s→0 i K and F(s) – loop filter s + Kd ⋅ Kv ⋅ F(s) characteristics! à Lets look at special cases! Analog Loop Filter • There are e number of options for the loop filter • In the case of first-order PLL we assume F(s) = 1 (All-pass filter) Analog Loop Filter – First Order • We assume All-pass filter: He ( f ) =1− H( f ) – F(f) = 1àFirst Order PLL jω He ( f ) = jω + Kd ⋅ Kv K ⋅ K H( f ) = d v jω + Kd ⋅ Kv PLL Basic Operation Analog Loop Filter – First Order • Example 1: Assume the loop is locked and we have a phase step change. Calculate the steady-state phase error: Remember: θin (t) = Δθ ⋅u(t)→ Θin (s) = Δθ / s Θe (∞) = lims→0 sΘe (s);s = jω s⋅ Δθ s2 Θe (∞) = lims→o = 0 Θe (∞) = lims→0 Θi (s)⋅ s + Kd ⋅ Kv s + Kd ⋅ Kv ⋅ F(s) Indicating no phase error! • Example 2: Assume the loop is locked and we have a frequency step change. Calculate the SS phase error: ω (t) = ω + Δω ⋅u(t)→θ (t) = Δω ⋅t in c in Note that the larger K 2 Θin ( f ) = Δω / ( jω) ;s = jω The smaller the error will be! 2 Θin (s) = Δω / (s) s2 Δω Θe (∞) = lims→o Θin (s) = s + Kd ⋅ Kv Kd ⋅ Kv Indicating a slight phase error! Analog Loop Filter – First Order How does the control voltage v2(t) change if the frequency of the input signal changes? ω (t) = ω + Δω ⋅u(t)→θ (t) = Δω ⋅t in c in V1(t) 2 Θin ( f ) = Δω / ( jω) ;s = jω 2 Θin (s) = Δω / (s) v1(t) = Kd ⋅ vo (t)⋅ vin (t) V1( f ) = Kd ⋅Θe ( f ) jω V1( f ) = Kd ⋅Θin ( f )⋅ ;F( f ) =1 jω + Kd ⋅ Kv 2 jω V1( f ) = Kd ⋅ Δω / ( jω) ⋅ jω + Kd ⋅ Kv Kd ⋅ Δω V1( f ) = jω( jω + Kd ⋅ Kv ) K ⋅ Δω kt v (t) = d (1− e− );k = K ⋅ K 1 k d v Analog Loop Filter – First Order How does the control voltage v2(t) change if the frequency of the input signal changes? ω (t) = ω + Δω ⋅u(t)→θ (t) = Δω ⋅t in c in V1(t) 2 Θin ( f ) = Δω / ( jω) ;s = jω 2 Θin (s) = Δω / (s) v1(t) = Kd ⋅ vo (t)⋅ vin (t) V1( f ) = Kd ⋅Θe ( f ) jω V1( f ) = Kd ⋅Θin ( f )⋅ ;F( f ) =1 jω + Kd ⋅ Kv 2 jω V1( f ) = Kd ⋅ Δω / ( jω) ⋅ jω + Kd ⋅ Kv Kd ⋅ Δω V1( f ) = jω( jω + Kd ⋅ Kv ) K ⋅ Δω kt v (t) = d (1− e− );k = K ⋅ K 1 k d v Analog Loop Filter – First Order Where is the demodulated signal if the input is an FM modulated signal? s(t)= Ac cos(ωct +θin (t)) D V1(t) θ (t) = D m(τ )dτ ⇒ Θ (s) = f M(s) in f ∫ in s Kv Θout (s) Θout (s) = V2 (s)⋅ ⇒ V2 (s) = s⋅ s Kv Θout (s) = Θin (s)H(s) Kv (Hz/V) % Df ( s Df Kd Kv V2 (s) = ' M(s)⋅ H(s)* = ⋅ M(s) Frequency deviation sensitivity Kf (Hz/V); & s ) Kv Kv s + KvKd Or Df (rad/V) 2πK f ω3−dB = KvKd >> 2π f ⇒ V2 (s) = M(s) Kv 2πK f v2 (t) = m(t) Kv Analog Loop Filter – First Order- Example Assume s(t) =cos( 1000pi + 50sin(20pi.t)) passing through a PLL Phase detector gain Kd=0.5 V/rad VCO gain constant Kv=1000pi rad/sec-volt Answer the following questions: V1(t) 1. What is the modulating frequency? 2. What is the carrier frequency? 3. What is the modulation Index. 4. Find the maximum freq. Deviation. 5. Frequency Deviation Sensitivity (Df in rad/V) 6. Calculate the total loop gain. 7. What will be the expression for the modulating signal, m(t)? 8. Find v2(t). 9. Calculate the steady state phase error. Analog Loop Filter – First Order- Example Assume s(t) =cos( 1000pi + 50sin(20pi.t)) passing through a PLL Phase detector gain Kd=0.5 V/rad VCO gain constant Kv=1000pi rad/sec-volt Answer the following questions: V1(t) 1.