Embedded System Tools Reference Manual EDK UG111 (v14.6) June 19, 2013 [optional] UG111 (v14.6) June 19, 2013 This document applies to the following software versions: ISE Design Suite 14.6 through 14.7 Xilinx is disclosing this user guide, manual, release note, and/or specification (the “Documentation”) to you solely for use in the development of designs to operate with Xilinx hardware devices. You may not reproduce, distribute, republish, download, display, post, or transmit the Documentation in any form or by any means including, but not limited to, electronic, mechanical, photocopying, recording, or otherwise, without the prior written consent of Xilinx. Xilinx expressly disclaims any liability arising out of your use of the Documentation. Xilinx reserves the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors contained in the Documentation, or to advise you of any corrections or updates. Xilinx expressly disclaims any liability in connection with technical support or assistance that may be provided to you in connection with the Information. THE DOCUMENTATION IS DISCLOSED TO YOU “AS-IS” WITH NO WARRANTY OF ANY KIND. XILINX MAKES NO OTHER WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT OF THIRD-PARTY RIGHTS. IN NO EVENT WILL XILINX BE LIABLE FOR ANY CONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTAL DAMAGES, INCLUDING ANY LOSS OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OF THE DOCUMENTATION. © Copyright 2002 - 2013 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners. Revision History The following table shows the revision history for this document. Date Version Revision 04/24/2012 14.1 EDK 14.1 release changes: Updated Chapter 10, Xilinx Microprocessor Debugger (XMD) with information about the Dual ARM Cortex-A9 MPCore. 07/25/2012 14.2 EDK 14.2 release changes: Updated Chapter 10, Xilinx Microprocessor Debugger (XMD) with additional options for rst when used with Zynq®-7000 EPP devices. 10/16/2012 14.3 EDK 14.3 release changes: •Added Setting Options on a Software Application, page 52. •Added Settings on Special Software Applications, page 53. • Updated Version Management Tools (revup) to specify that the Version Management Wizard cannot be run from command line. 03/20/2013 14.5 EDK 14.5 release changes. • Added XMD ARM-specific commands. See XMD ARM-Specific Commands, page 157. 06/19/2013 14.6 EDK 14.6 release changes: • Added information on ARM Cortex A9 where appropriate. • A MicroBlaze interrupt handling attribute has been added (fast_interrupt). See Chapter 9, GNU Compiler Tools. • The procedural steps in Chapter 11, Debug Flow Using GDB have been updated. Embedded System Tools Reference Manual www.xilinx.com UG111 (v14.6) June 19, 2013 Table of Contents Revision History . 2 Chapter 1: Embedded System and Tools Architecture Overview Design Process Overview . 8 EDK Overview . 10 EDK Tools and Utilities . 11 Xilinx Platform Studio . 13 Software Development Kit . 17 Chapter 2: Platform Specification Utility (PsfUtility) Tool Options. 21 MPD Creation Process Overview . 22 Use Models for Automatic MPD Creation. 23 DRC Checks in PsfUtility . 25 Conventions for Defining HDL Peripherals . 25 Chapter 3: Psf2Edward Program Program Usage . 41 Program Options . 41 Chapter 4: Platform Generator (Platgen) Features. 43 Tool Requirements. 43 Tool Usage . 44 Supported Platgen Syntax Options . 44 Load Path . 45 Output Files . 45 Synthesis Netlist Cache . 46 Chapter 5: Command Line Mode Invoking XPS Command Line Mode. 47 Creating a New Empty Project . 47 Creating a New Project With an Existing MHS . 48 Opening an Existing Project . 48 Saving Your Project Files . 48 Setting Project Options. 48 Executing Flow Commands. 50 Reloading an MHS File . 50 Embedded System Tools Reference Manual www.xilinx.com 3 UG111 (v14.6) June 19, 2013 Send Feedback Adding or Updating an ELF File . 51 Deleting an ELF File. 51 Archiving Your Project Files. 51 Setting Options on a Software Application . 52 Settings on Special Software Applications . 53 Restrictions . 53 Chapter 6: Bus Functional Model Simulation Bus Functional Model Use Cases . 56 Bus Functional Simulation Methods . 57 PLB BFM Package. 59 Using the AXI BFM Package. 65 Chapter 7: Simulation Model Generator (Simgen) Simgen Overview . 71 Simulation Libraries . 71 Compxlib Utility . 73 Simulation Models. 73 Simgen Syntax . 76 Output Files . 79 Memory Initialization . 80 External Memory Simulation . 83 Simulating Your Design. 85 Chapter 8: Library Generator (Libgen) Overview . 87 Tool Usage . 87 Tool Options. 87 Load Paths . 88 Output Files . 89 Generating Libraries and Drivers. 91 MSS Parameters. ..