S P a C E C U B E Spacecube V3.0 Mini

S P a C E C U B E Spacecube V3.0 Mini

National Aeronautics and Space Administration SpaceCubeSpaceCube v3.0v3.0 MiniMini NASA Next-Generation Data-Processing System for Advanced CubeSat Applications Christopher Wilson, PhD Science Data Processing Branch Software Engineering Division NASA - Goddard Space Flight Center Greenbelt, MD, USA NASA Electronic Parts and Packaging S p a c e C u b e (NEPP) Program 2019 Electronics Technology Workshop June 2019 www.nasa.gov Acronyms Acronym Definition BL-TMR BYU-LANL TMR cFE Core Flight Executive cFS Core Flight System CPU Central Processing Unit CSP CHREC/CubeSat Space Processor DSP Digital Signal Processor FF Flip-Flop FPGA Field Programmable Gate Array FSM Finite State Machine ISA Instruction Set Architecture LEO low-Earth Orbit MGT Multi-Gigabit Transceiver PCB Printed Circuit Board RE Recuring Engineering SBC Single-Board Computer SEL Single-Event Latchup SEM Soft Error Mitigation TID Total Ionizing Dose TMR Triple Modular Redundancy SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 2 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 Outline 1 Introduction 2 SpaceCube Overview • SpaceCube Introduction • SpaceCube Approach • Mini Design Philosophy • Lessons Learned 3 SmallSat / CubeSats for Space • SmallSat/CubeSat Challenge • Xilinx Space-grade Devices • Kintex UltraScale • Soft-Core Processors 4 SpaceCube v3.0 Mini • Configuration Schemes • Fault-Tolerant Operation • Specification SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 3 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 Goals, Motivations, Challenges Goals Motivations Challenges Develop reliable, high-speed Many commercial CubeSat Managing PCB area restrictions hybrid processor using processor offerings primarily target for rad-hard components, SpaceCube design approach benign LEO orbits and do not balancing cost, educating to enable next-generation strongly address radiation mission designers for instrument and CubeSat capability concerns and parts qualification key reliability differences Need exceptional capability to support complex applications SCIENCE DATA PROCESSINGsuch BRANCH as artificial • Codeintelligence 587 • NASA GSFC 4 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 SpaceCubeSpac Cub Introductionntro uctior What is SpaceCube? A family of NASA developed space processors that established a hybrid- processing approach combining radiation-hardened and commercial components while emphasizing a novel architecture harmonizing the best capabilities of CPUs, DSPs, and FPGAs High performance reconfigurable science / mission data processor based on Xilinx FPGAs – Hybrid processing … CPU, DSP, and FPGA logic – Integrated “radiation upset mitigation” techniques – SpaceCube “core software” infrastructure (cFE/cFS and “SpaceCube Linux” with Xenomai) – Small “critical function” manager/watchdog SpaceCube is – Standard high-speed (multi-Gbps) interfaces Hybrid Processing… SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 5 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 SpaceCube Heritage Closing the gap with commercial processors while retaining reliability 57+ Xilinx device-years on orbit SpaceCube is 26 Xilinx FPGAs in space to date (2019) Mission Enabling… 11 systems in space to date (2019) SpaceCube v1.0 SpaceCube v1.5 SpaceCube v2.0-EM STS-125, MISSE-7, SMART (ORS) STP-H4, STP-H5 STP-H4, STP-H5, STP-H6 SpaceCube v2.0-FLT SpaceCube v2.0 Mini RRM3, STP-H6 (NavCube) STP-H5, UVSC-GEO SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 6 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 SpaceCube Approach The traditional pathpath of developing radiationradiation­- 01 hardenedhardened flight processorprocessor will notnot work …... _ _. they areare alwaysalways one or two generations behindbehind UseUse latestlatest radiationradiation-tolerant•-tolerant* processingprocessing 02 elementselements to achieve massivemassive improvementImprovement inin -- “uMIPS/watt"MIPS/watt” ((forfor same size/weight/powersize/weight/power)) ---. Accept that radiationradiation inducedinduced upsetsupsets maymay happenhappen occasionally and just dealdeal with them appropriatelyappropriately …... 03 any levellevel ofof reliabilityreliability can bebe achieved -- via smart system design!design I *Radiation tolerant – susceptible to radiation induced upsets (bit flips) SCIENCEbut not radiation DATA-induced PROCESSING destructive failures (latch BRANCH-up) • Code 587 • NASA GSFC 7 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 Mini Design Philosophy SpaceCube v3.0 Processor Card SpaceCube v3.0 Mini 220.00 91.54 DDR3 128Gb Nanci Flash 2GB (K72) m [Eh Kintex "' 6 > tl I! Ultrascale ! 2GB(ll72) C 128Gb n ~ a l!!g V FPGA !! 00 00 . @]~ . RTAX Rad- C iil MPSoC afil .." ~ HardMonitcr ~"' 1i 88 !;i 100 ...u ~ rl!I Kintex PROASIC § ; Rad-hard "Cl Ultrascale DDR3 ~ D Monitor 2GB (x72) [;]h Same Approach, Smaller Size Supervision Requested SpaceCube design approach Radiation-hardened monitor applied to smaller form-factor architecture and code reusable Key Design Reused Trade in, Trade Out Much of UltraScale design and EEE parts trades, analysis, and interface remain same between circuits extensively leveraged cards including DDR Pinout from main card design SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 8 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 Mini Form Factor Lessons Learned Manufacturability Difficult to manufacture due to rigid- flex and laser-drilled microvias. Tied to single vendor design. SpaceCube Mini v2.0 Monitor Design Lessons Learned Aeroflex rad-hard monitor was effective, however, limited by FPGA resources preventing more robust design CubeSat Connector Samtec SEARAY connector provided flexibility and performance, same connector used with SpaceVNX CSPv1 (VITA 74.4) Lessons Learned Backplane Advantage Backplane allows swapping of individual card as advances/ improvements are made and can easily incorporate new components SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 9 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 SmallSat/CubeSat Processor Challenge Massively Expanding Commercial Market for SBCs SATELLITE LAUNCH HISTORY & MARKET FORECAST Nano/Microsatellites (7 - 50 kg) • Tons of commercial vendors in CubeSat Market 800 (e.g. Pumpkin, Tyvak, GomSpace, ISIS, - -- • F~ Market Pat~ntlal ,,, ,; > 745 700 .. • Spac-ewOB:SFOtt<:a~t • Hl!i-!Odcal LiiUOOhes _.....;, Clyde Space, etc…) 600 , ..S38 500 .. ' !i13 400 457 400 Mission Developers Seeking Commercial Hardware 300 • Under pressure from cost-cap missions, and 200 reducing costs in general • Reduced RE for constellation mission concepts • Attractive all-commercial solutions provided “2019 Nano/Microsatellite Forecast, 9th Edition,” integrating several CubeSat “Kit” types of cards SpaceWorks Enterprises, Inc., Jan 2019. Not Designed With Harsh Orbit Considerations Beyond LEO • Many vendors have performed limited radiation testing and largely support missions in more benign LEO orbits • Mission is radiation test approach • Little-to-no additional radiation testing or parts qualification • No recommendations for fault-tolerant configurations of offered SBCs SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 10 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 Xilinx Space Devices Compared SpaceCube v1.0 SpaceCube v2.0 SpaceCube v3.0 XQR4V XQR5VXQRSV XQRKU060 (RT, 1.2V) (RHBD, 1.0V) (RT, 1.01V) KU060 vs. V5 Resource FX60 FX140 FX130 KU060 Logic Cells 56,880 142,128 131,072 726,000 5.54x CLB FF 50,560 126,336 81,920 663,360 8.10x Max Distributed RAM (Kb) 395 987 1,580 9,180 5.81x Total Block RAM (Kb) 4,176 9,936 10,728 38 Mb 3.54x BRAM/FIFO ECC (36 Kb) -------- -------- -------- 1,080 N/A DSP Slices 128 192 320 2,760 8.63x MGT 18 @ 4.25 Gbps 32 @ 12.5 Gbps 5.23x TID (krad) 300 300 1,000 120 (0.12) SEL >125 >125 >125 ~80 (0.64) B-Flow (QML-Q) B-Flow (QML-Q) Flow V-Flow (QML-V) Y-Flow (QML-Y N/A V-Flow (QML-V) Compilant) Package 35 x 35 mm 40 x 40 mm 45 x 45 mm 40 x 40 mm (0.78) “Xilinx’s Adaptive FPGAs for Space SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 11 Applications” White Paper SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 Xilinx Kintex UltraScale XQRKU060 • First 20 nm FPGA for Space – Designed for SEU mitigation (>40 patents) – Deploys same commercial silicon mask set – Uses Vivado UltraFast Development • Ruggedized 1509 CCGA – 40 mm x 40mm package – Footprint compatible A1517 • Product Space Test Flows Lee, D., Allen, G., Swift, G., Cannon, M., Wirthlin, M., George, J. S., Koga, R., and K. Huey, “Single-Event – B-Flow (QML-Q Equiv.) and Characterization of the 20 nm Xilinx Kintex UltraScale Field- Y-Flow (QML-Y Compliant) Programmable Gate Array under Heavy Ion Irradiation,” IEEE Radiation Effects Data Workshop, July 13-17, 2015. • Commercial Radiation Testing Results Berg, M., Kim, H., Phan, A., Seidleck, C., Label, K., and M. Campola, “Xilinx Kintex-UltraScale Field Programmable Gate – Improved Xsect compared to 7 series Array Single Event Effects (SEE) Heavy-ion Test Report,” NASA Electronic Parts and Packaging, 2017. – No observed classical SEL signatures SCIENCE DATA PROCESSING BRANCH • Code 587 • NASA GSFC 12 SpaceCube v3.0 Mini - NASA Goddard Space Flight Center – June 2019 Fault-Tolerant Soft-Core Processing Resource Utilization of TMR Designs on KU040 Xilinx TMR MicroBlaze1 MicroBlazeMicroBlaze Xilinx TMR BLBL-TMR-TMR BL-TMR • Built-in Xilinx TMR solution for newer FPGAs Resource

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