www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic Circuits Unit – 2 Combinational Logic Circuits Objectives • Understand what are combinational logic circuits • Use the sum-of-products method to design a logic circuit based on a design truth table • Be able to make Karnaugh maps and use them to simplify Boolean expressions Introduction Logic Circuits are categorized into 2 types (based on whether they contain memory or not): • Combinational Logic Circuits o Circuits without memory • Sequential Logic Circuits o Circuits with memory Combinational Logic Circuits The output of combinational logic circuit depends only on the current inputs. A combinational logic circuit block is as shown below: There are two fundamental approaches in logic design. They are: • The Sum-of-Products (SOP) Method – Solution results in an AND-OR or NAND-NAND network Page 1 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic Circuits • The Product-of-Sums (POS) Method – Solution results in an OR-AND or NOR-NOR network We select a simpler circuit because it costs less and is more reliable. The Sum-of-Products (SOP) Method Product term A product term is a conjunction of literals, where each literal is either a Boolean variable or its complement. Examples: A . B A’ . B. C’ A Fundamental product or Minterm For a function of n variables, a product term in which each of the n variables appears once (in uncomplemented or complemented form) is called a fundamental product or minterm Fundamental Products for Two inputs Consider two inputs A and B. The fundamental products or minterms are listed below: Inputs Fundamental products or A B minterms 0 0 m0 = A’ . B’ 0 1 m1 = A’ . B 1 0 m2 = A . B’ 1 1 m3 = A . B Sum-of-Products (SOP) Equation The SOP equation can be represented by an expression that is a sum of minterms, where each minterm is ANDed with the value of Y for the corresponding valuation of input variables. Consider, Y = m0 . 0 + m1 . 1 + m2 . 1 + m3 . 1 = m1 + m2 + m3 = A’ . B + A . B’ + A . B Page 2 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic CircuitsCircuits Compact form Y = f(A, B) = Σ m(1, 2, 3) Truth Table: Inputs Output A B Y 0 0 0 0 1 1 1 0 1 1 1 1 Logic Circuit For the obtained SOP equation, we can realize the logic circuit by drawing an AND-OR network as shown below: Another way of realization is by a NAND-NAND network as shown below: Simplified Logic Circuit Consider the Boolean SOP equation: Y = A’ . B + A . B’ + A . B Page 3 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic CircuitsCircuits We can simplify it Y = A’ . B + A . B’ + A . B + A . B = A’ . B + A . B + A . B’ + A . B = B . (A’ + A) + A . (B’ + B) = B . 1 + A . 1 = B + A = (A + B) Logic Circuit: Y = (A + B) Canonical Sum-of-Products Form If each product term is a minterm, then the expression is said to be in a canonical sum--of-products form or standard SOP form. Example: Y = A’ . B + A . B’ + A . B (canonical SOP form) Y = A + B (simplified form) 3 Variable Example: Y = A’ . B . C + A . B’ . C + A . B . C’ + A . B . C = F(A, B, C) = Σ m(3, 5, 6, 7) Simplification Y = A’ . B . C + A . B’ . C + A . B . C’ + A . B . C Y = B . C . (A’ + A) + A . C .(B’ + B) + A . B . (C’’ ++ C)C) usingusing AdjacencyAdjacency TheoremTheorem = B . C. 1 + A . C . 1 + A . B . 1 = B . C + A . C + A . B Y = A . B + A . C + B . C Page 4 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic CircuitsCircuits The simplified logic expression is realized using NAND gates as shown below: Truth Table To Karnaugh Map A Karnaugh map (K-map) is a visual display of the fundamental productss forfor aa SOPSOP solutionsolution. K-map is a modification of the Venn diagram and refinement of Edward Veitch's diagram. K-map was developed by Maurice Karnaugh, an American Physicist. 2 – Variable Karnaugh Map Consider the Venn diagram for the two variables A and B. The diagram is rewritten as shown below: Page 5 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic Circuits Next, we obtain the Karnaugh map for two variables as shown below: A’B’ A’B AB’ AB Alternate representation for Karnaugh map is as shown below: Karnaugh Map Simplification Consider a two-variable logic circuit. The first step is to convert 2-variable truth table into its Karnaugh map (K-map). Page 6 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic Circuits Example: Consider a two-variable truth table as given below: Inputs Output A B f 0 0 0 0 1 1 1 0 1 1 1 1 The two-variable K-map is drawn as shown below: Terminology Literal A given product term consists of some number of variables, each of which may be in uncomplemented or complemented form. Each appearance of a variable, either in uncomplemented or complemented, is called a literal. Example: The product term AB’C has 3 literals, and the term A’BC’D has 4 literals Implicant A product term that indicates the input valuation for which a given function is equal to 1 is called an implicant of the function. Also there are the implicants that correspond to all possible pairs of minterms that can be combined (set of 2i minterms, i<=n). Prime Implicant An implicant is called prime implicant if it is not a subset of another implicant of the function. Page 7 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic Circuits Essential Prime Implicant A prime implicant which includes a 1 cell that is not included in any other prime implicant is called an essential prime implicant. K-map Simplification Steps The K-map simplification steps are: 1. Generate all prime implicants for the given function f 2. Find the set of essential prime implicants 3. If the set of essential prime implicants covers all valuations for which function f =1, then this set is the desired cover of f Otherwise, determine the nonessential prime implicants that should be added to form a complete minimum-cost cover Example: The map contains 2 pairs of 1s which are prime implicants p1 and p2. They cover all valuations for which f = 1. Both p1 and p2 are essential. Consider the essential prime implicant p1. Page 8 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic Circuits As we move from the first 1 to second 1, only one variable goes from complemented to uncomplemented form i.e. A’ to A; the other variable B does not change. Whenever this happens, you can eliminate the variable that changes form and we have p1 = B. Next, consider the essential prime implicant p2. Similarly p2 = A. Hence we have the simplified Boolean expression f(A, B) = A + B Questions 1. Explain the definition of combinational logic. 2. Write the truth table of the logic circuit having 3 inputs A, B & C and the output expressed as Y = AB’C + ABC. Also simplify the expression using Boolean Algebra and implement the logic circuit using NAND gates. 3. Define prime implicant and essential prime implicant. Page 9 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic Circuits Unit – 2 Combinational Logic Circuits Objectives • Draw 3- variable and 4- variable Karnaugh maps and use them to simplify Boolean expressions • Understand don’t Care Conditions • Use the Product-of-Sums Method to design a logic circuit based on a design truth table • Perform conversion between SOP and POS 3 - Variable Karnaugh Map Consider a logic equation Y = f(A, B, C). We have 8 fundamental products or minterms as shown below. We need to arrange them so that they are adjacent. A B C Minterms 0 0 0 A’B’C’ m0 0 0 1 A’B’C m1 0 1 0 A’BC’ m2 0 1 1 A’BC m3 1 0 0 AB’C’ m4 1 0 1 AB’C m5 1 1 0 ABC’ m6 1 1 1 ABC m7 Adjacent terms differ in the values of only one variable. A given 3-variable minterm will have 3 adjacent terms. Example: 3 adjacent terms of minterm ABC are: A’BC, AB’C, ABC’ We use Gray code to position the minterms. In Gray code, consecutive codes differ in one variable only. Page 1 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic Circuits 3- bit Gray Code The 3-bit Gray code is tabulated below: G2 G1 G0 0 0 0 0 0 1 0 1 1 0 1 0 1 1 0 1 1 1 1 0 1 1 0 0 The 3 - variable Karnaugh map is drawn as shown making use of the Gray code. 3- Variable K-map Simplification Example 1: Consider Y = f(A, B, C) = Σ m (2, 3, 4, 6) = A’BC’ + A’BC + AB’C’ + ABC’ The Karnaugh map for the given logic expression is drawn as shown below: The simplified expression Y = A’B + AC’ Page 2 www.getmyuni.com 10CS 33 LOGIC DESIGN UNIT – 2 Combinational Logic Circuits Example 2: Simplify Y = f(A, B, C) =Σ m (0, 2, 4, 6). The Karnaugh map for the given logic expression is drawn as shown below: The simplified expression is Y= C’. Example 3: Simplify Y = f(A, B, C) =Σ m (1, 2, 3, 5, 6, 7) The Karnaugh map for the given logic expression is drawn as shown below: The simplified expression Y= B + C.