VIA EdenTM Embedded System Platform Processor Datasheet Revision 1.79 October 11, 2004 VIA TECHNOLOGIES, INC. VIA Eden ESP Processor Datasheet October 11, 2004 This is Version 1.79 of the VIA Eden ESP Processor Datasheet. © 2002-2004 VIA Technologies, Inc All Rights Reserved. VIA reserves the right to make changes in its products without notice in order to improve design or performance characteristics. This publication neither states nor implies any representations or warranties of any kind, including but not limited to any implied warranty of merchantability or fitness for a particular purpose. No license, express or implied, to any intellectual property rights is granted by this document. VIA makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication or the information contained herein, and reserves the right to make changes at any time, without notice. VIA disclaims responsibility for any consequences resulting from the use of the information included herein. Cyrix, VIA C3, and VIA Eden ESP are trademarks of VIA Technologies, Inc. CentaurHauls is a trademark of Centaur Technology Corporation. AMD, AMD K6, and Athlon are trademarks of Advanced Micro Devices, Inc. Microsoft and Windows are registered trademarks of Microsoft Corporation. Intel, Pentium, Celeron, and MMX are registered trademarks of Intel Corporation. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies. LIFE SUPPORT POLICY VIA processor products are not authorized for use as components in life support or other medical devices or systems (hereinafter life support devices) unless a specific written agreement pertaining to such intended use is executed between the manufacturer and an officer of VIA. 1. Life support devices are devices which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. This policy covers any component of a life support device or system whose failure to perform can cause the failure of the life support device or system, or to affect its safety or effectiveness. October 11, 2004 VIA Eden ESP Processor Datasheet Revision History Document Release Date Revision Initials 1.21 9/16/02 Added EBGA mechanical specification diagram EY 1.22 9/19/02 Modified VTT voltage in normal operating condition (Table 5-8) EY 1.3 10/31/02 Modified EBGA mechanical specification diagram from EY EBGA368 / 376 to EBGA 368 1.4 11/25/02 Corrected miscellaneous document inconsistencies EY 1.5 3/11/03 Removed “Preliminary Information” from document EY Modified EBGA ball diagram 1.51 3/14/03 VIH2.5 – Input High Voltage changed from 2.0V to 1.55V EY 1.52 5/23/03 Added ESP 3000 and 7000 info into table 5-12 EY Updated top marking specification 1.6 5/28/03 Fixed miscellaneous document inconsistencies and errors EY 1.61 6/10/03 Added ESP 3000/7000 info into table 5-12 ~ 5-15 EY 1.62 8/26/03 Updated table 5-7 EY 1.63 11/14/03 Added information on Model 9 processors EY 1.64 11/18/03 Updated table 5-3 EY 1.65 3/2/04 Updated table 5-8 JW 1.66 3/3/04 Updated figures 6-3, 6-4, 6-5 JW 1.67 3/25/04 Changed ball pitch spec on page 6-6 JW 1.68 4/12/04 Updated table 5-8 JW 1.69 5/10/04 Updated figure 6-2 JW 1.70 6/3/04 Added 200 MHz FSB processor information JW 1.71 6/14/04 Updated table 5-8 JW 1.72 6/18/04 Added timing diagrams JW 1.73 7/13/04 Updated top markings JW 1.74 7/21/04 Updated section 1-3, figure 6-5 and table 5-8 JW 1.75 7/30/04 Updated POWERGOOD information in figure 5-5, 5-6 and table JW 4-3 Added figure 6-2, 6-4 1.76 8/19/04 Updated figures 6-5, 6-6, table 5-8 and section 7-1 JW 1.77 9/8/04 Updated top marking diagrams JW 1.78 9/21/04 Removed 376 ball figures JW 1.79 10/11/04 Updated figure 6-5: added 100oC information Revision History i VIA Eden ESP Processor Datasheet October 11, 2004 Updated table 5-8 Updated section 7-1, paragraph 1 ii October 11, 2004 VIA Eden ESP Processor Datasheet Table of Contents INTRODUCTION .........................................................................................................................................................1-1 ARCHITECTURE..........................................................................................................................................................2-1 2.2.1 general architecture & features..............................................................................................................2-3 2.2.2 instruction fetch .......................................................................................................................................2-6 2.2.3 instruction decode....................................................................................................................................2-7 2.2.4 branch prediction ....................................................................................................................................2-8 2.2.5 integer unit...............................................................................................................................................2-9 2.2.6 d-cache & datapath ...............................................................................................................................2-10 2.2.7 l2 cache .................................................................................................................................................2-10 2.2.8 fp unit.....................................................................................................................................................2-11 2.2.9 mmx unit ................................................................................................................................................2-11 2.2.10 3dnow! unit (Model 7).......................................................................................................................2-12 2.2.11 SSE unit (Model 9)...........................................................................................................................2-12 2.2.12 bus unit ..............................................................................................................................................2-12 2.2.13 power management............................................................................................................................2-12 PROGRAMMING INTERFACE..................................................................................................................................3-1 3.3.1 general.....................................................................................................................................................3-4 3.3.2 standard cpuid instruction functions .......................................................................................................3-4 3.3.3 extended cpuid instruction functions .......................................................................................................3-7 3.3.4 centaur extended cpuid instruction functions ........................................................................................3-10 3.3.5 processor identification .........................................................................................................................3-11 3.3.6 edx value after reset...............................................................................................................................3-11 3.3.7 control register 4 (cr4) ..........................................................................................................................3-12 3.3.8 Machine-Specific Registers....................................................................................................................3-12 HARDWARE INTERFACE .........................................................................................................................................4-1 4.1.1 differences................................................................................................................................................4-1 4.1.2 clarifications............................................................................................................................................4-2 4.1.3 omissions .................................................................................................................................................4-5 4.4.1 bist .........................................................................................................................................................4-11 4.4.2 jtag.........................................................................................................................................................4-11 4.4.3 debug port..............................................................................................................................................4-11 ELECTRICAL SPECIFICATIONS .............................................................................................................................5-1 5.2.1 recommended operating conditions.......................................................................................................5-11 5.2.2 maximum ratings ...................................................................................................................................5-13