CDA 5106 Presentation Groups Fall 2015 Group Number Group Name Group Members Dates and Topics 1 Aero Blue • Kuldip Singh Atwal • Sept. 2: Early Development of Computers • Omesh Dalchand • Oct. 26: The Emotion Engine of the Sony PlayStation 2 2 Blizzard Blue • Vijay Chander • Sept. 2: Memory Hierarchy and Protection • Kishore Debnath • Oct. 26: Inside a Cell Phone • Vaibhav Dedhia 3 Catalina Blue • Brian Dickens • Sept. 9: Evolution of Instruction Sets • Brian Fields • Oct. 28: Interconnection Networks; Interconnecting Two Devices 4 Dark Pastel Blue • Raymond Cload • Sept. 9: Pipelining and Instruction-Level Parallelism • Sirisha Gadiparti • Oct. 28: Interconnection Networks; Connecting • Shrutha Keerthi More than Two Devices Gandla 5 Electric Blue • Marzieh Edraki • Sept. 14: SIMD Supercomputers, Vector • Joel Gardyasz Computers, GPUs • Kaveh Shamsi • Nov. 2: Network Topology 6 French Blue • Joshua Harsh • Sept. 14: Multimedia SIMD Instruction extensions • Mathura Joshi • Nov. 2: Network Routing, Arbitration, and Switching • Sharad Chandra Mahesh 7 Green Blue • Shahidul Islam • Sept. 16: Multiprocessors and Parallel Processing • Sungchul Jung • Nov. 4: Switch Microarchitecture • Joseph Kaile CDA 5106 Presentation Groups Fall 2015 Group Number Group Name Group Members Dates and Topics 8 Han Blue • Fereshteh • Sept. 16: Clusters Jafariakinabad • Nov. 4: Practical Issues for Commercial • Brandon Jones Interconnection Networks • Pooya Khaloo 9 Imperial Blue • Tajreen Khan • Sept. 21: Classifying Instruction Set Architectures • Blake Klasing • Nov. 9: Examples of Interconnection Networks • Xin Li 10 Jordy Blue • Kenneth Love • Sept. 21: Memory Addressing • Rahulcharanbose • Nov. 9: Crosscutting Issues for Interconnection Madavarapu Networks • Brook Stacy 11 Keppel Blue • Javier Lores • Sept. 23: Type and size of operands, Operations in • Siyang Lu the Instruction Set • Mayur Radha Jayaram • Nov. 11: Vector Performance; Vector Memory Systems 12 Lavender Blue • Gangadhar • Sept. 23: Instructions for Control Flow Mahadevan • Nov. 11: Performance of Vector Processors; Cray • Tushar Mahrishi X1 13 Majestic Blue • William McAuliff • Sept. 28: The Role of Compilers • Jacob Wurm • Nov. 16: Detecting and Enhancing Loop-level parallelism 14 Navy Blue • Darshan Negandhi • Sept. 28: The MIPS Architecture • Suhas Nityanandappa • Nov. 16: Hardware Support for Exposing Parallelism and for Complier Speculation CDA 5106 Presentation Groups Fall 2015 Group Number Group Name Group Members Dates and Topics 15 Ocean Boat Blue • Brian Olive • Sept. 30: Cache Performance • Kushal Raghav Poojari • Nov. 18: Intel IA-64 Architecture; Itanium Processor 16 Picton Blue • Ketan Kumar Puram • Sept. 30: Basic Cache Optimizations • Ahmad Qutbuddin • Nov. 18: Inter-processor Communication and Scientific Applications 17 Queen Blue • Hariraghav Ramasamy • Oct. 5: Virtual Memory • Anvay Arvind Rane • Nov. 23: Scientific Applications on Shared-memory Multiprocessors 18 Royal Blue • John Singleton • Oct. 5: Protection and Examples of Virtual Memory • Josiah Wang • Nov. 23: Implementing Cache Coherence; IBM Blue Gene L 19 Sapphire Blue • Somanth Saha • Oct. 7: Pipeline Hazards • Jun Xu • Nov. 25: RISC Architectures for Desktop, Server, and Embedded Computers 20 True Blue • Vaibhav Saxena • Oct. 7: Pipeline Hazards • Dushyant Sharma • Nov. 25: Intel 80x86 • Harish Raviprakash 21 Ultramarine Blue • Ramin Izadpanah • Oct. 12: Pipeline Implementation • Changyong Zhao • Nov. 30: Fallacies and pitfalls regarding quantitative design and analysis (Chapter 1) 22 Violet Blue • Reema Shababou • Oct. 12: Why is Pipelining Hard to Implement • Gaurav Kataria • Nov. 30: Fallacies and pitfalls regarding memory • Nikhil Nagraj Rao design hierarchies (Chapter 2) CDA 5106 Presentation Groups Fall 2015 Group Number Group Name Group Members Dates and Topics 23 Weldon Blue • Bingbing Rao • Oct. 14: MIPS R4000 Pipeline • Amirreza Samiei • Dec. 2: Fallacies and pitfalls regarding ILC • Debashri Roy (Chapter 3) 24 Xanadu Blue • Amlan Talukder • Oct. 14: Efficiency of Pipelining; Dynamically • Nikhil Shekhawat Scheduled Pipelines • Samaneh Saadat • Dec. 2: Fallacies and pitfalls regarding data-level parallelism (Chapter 4).