NMOS 6510 Unintended Opcodes no more secrets (v0.95 - 24/12/20) (w) 2013-2020 groepaz/solution, all rights reversed Contents Preface...................................................................................................................................................I Scope of this Document....................................................................................................................I Intended Audience............................................................................................................................I License..............................................................................................................................................I What you get...................................................................................................................................II Naming Conventions.....................................................................................................................III Address-Mode Abbreviations...................................................................................................III Mnemonics................................................................................................................................III Processor Flags.........................................................................................................................IV Opcode Matrix......................................................................................................................................1 Unintended Opcodes............................................................................................................................3 Overview..........................................................................................................................................3 Types................................................................................................................................................5 Combinations of two operations with the same addressing mode..............................................5 Combinations of an immediate and an implied command..........................................................5 Combinations of STA/STX/STY................................................................................................6 Combinations of STA/TXS and LDA/TSX................................................................................6 No effect......................................................................................................................................6 Lock-up.......................................................................................................................................6 Stable Opcodes................................................................................................................................7 SLO (ASO).................................................................................................................................7 Example: Multibyte arithmetic left shift and load leftmost byte............................................8 RLA (RLN).................................................................................................................................9 Example: scroll over a background layer.............................................................................10 SRE (LSE).................................................................................................................................11 Example: 8bit 1-of-8 counter...............................................................................................12 RRA (RRD)...............................................................................................................................13 Example: noise LFSR...........................................................................................................14 SAX (AXS, AAX).....................................................................................................................15 Example: store values with mask.........................................................................................16 Example: update Sprite Pointers..........................................................................................16 LAX..........................................................................................................................................18 Example: load A and X with same value..............................................................................19 DCP (DCM)..............................................................................................................................20 Example: decrementing loop counter...................................................................................21 Example: decrementing 16bit counter..................................................................................21 ISC (ISB, INS)..........................................................................................................................22 Example: incrementing loop counter...................................................................................23 Example: increment indexed and load value........................................................................23 ANC (ANC2, ANA, ANB).......................................................................................................24 Example: implicit enforcement of carry flag state...............................................................25 Example: remembering a bit................................................................................................25 ALR (ASR)...............................................................................................................................26 Example: right shift and mask..............................................................................................26 Example: fetch 2 bits from a byte........................................................................................27 Example: add offset depending on LSB...............................................................................27 ARR..........................................................................................................................................28 Example: rotating 16 bit values............................................................................................29 Example: load register depending on carry..........................................................................30 Contents Example: shift zeros or ones into accumulator....................................................................30 SBX (AXS, SAX, XMA)..........................................................................................................31 Example: decrement X by more than 1................................................................................32 Example: decrement nibbles................................................................................................33 Example: apply a mask to an index......................................................................................34 SBC (USBC, USB)...................................................................................................................35 LAS (LAR)...............................................................................................................................36 Example: cycle an index within bounds...............................................................................37 NOP (NPO, UNP).....................................................................................................................38 NOP (DOP, SKB)......................................................................................................................38 NOP (DOP, SKB, IGN).............................................................................................................38 NOP (TOP, SKW, IGN).............................................................................................................39 Example: acknowledge IRQ.................................................................................................40 JAM (KIL, HLT, CIM, CRP)....................................................................................................41 Example: stop execution......................................................................................................41 Unstable Opcodes..........................................................................................................................42 'unstable address high byte' group.............................................................................................42 SHA (AXA, AHX, TEA)......................................................................................................44 Example: SAX abs, y.......................................................................................................45 Example: SAX (zp), y......................................................................................................45 SHX (A11, SXA, XAS, TEX)..............................................................................................46 Example: STX abs, y.......................................................................................................47 Example: Sync with raster beam (remove cycle variance)..............................................47 SHY (A11, SYA, SAY, TEY)...............................................................................................49