Embedded DSP Processor Design Application Specific Instruction Set Processors “Liu: fm-p374123” — 2008/5/6 — 12:00 — pagei—#1 The Morgan Kaufmann Series in Systems on Silicon Series Editor: Wayne Wolf, Georgia Institute of Technology The Designer’s Guide to VHDL, Second Edition Peter J. Ashenden The System Designer’s Guide to VHDL-AMS Peter J. Ashenden, Gregory D. Peterson, and Darrell A. Teegarden Modeling Embedded Systems and SoCs Axel Jantsch ASIC and FPGA Verification: A Guide to Component Modeling Richard Munden Multiprocessor Systems-on-Chips Edited by Ahmed Amine Jerraya and Wayne Wolf Functional Verification Bruce Wile, John Goss, and Wolfgang Roesner Customizable and Configurable Embedded Processors Edited by Paolo Ienne and Rainer Leupers Networks-on-Chips:Technology and Tools Edited by Giovanni De Micheli and Luca Benini VLSI Test Principles & Architectures Edited by Laung-Terng Wang, Cheng-Wen Wu, and Xiaoqing Wen Designing SoCs with Configured Processors Steve Leibson ESL Design and Verification Grant Martin, Andrew Piziali, and Brian Bailey Aspect-Oriented Programming with e David Robinson Reconfigurable Computing:The Theory and Practice of FPGA-Based Computation Edited by Scott Hauck and André DeHon System-on-Chip Test Architectures Edited by Laung-Terng Wang, Charles Stroud, and Nur Touba Verification Techniques for System-Level Design Masahiro Fujita, Indradeep Ghosh, and Mukul Prasad VHDL-2008: Just the New Stuff Peter J. Ashenden and Jim Lewis On-Chip Communication Architectures: System on Chip Interconnect Sudeep Pasricha and Nikil Dutt Embedded DSP Processor Design: Application Specific Instruction Set Processors Dake Liu Processor Description Languages: Applications and Methodologies Edited by Prabhat Mishra and Nikil Dutt “Liu: fm-p374123” — 2008/5/6 — 12:00 — page ii — #2 Embedded DSP Processor Design Application Specific Instruction Set Processors Dake Liu AMSTERDAM • BOSTON • HEIDELBERG • LONDON NEW YORK • OXFORD • PARIS • SAN DIEGO SAN FRANCISCO • SINGAPORE • SYDNEY • TOKYO Morgan Kaufmann Publishers is an imprint of Elsevier “Liu: fm-p374123” — 2008/5/6 — 12:00 — page iii — #3 Morgan Kaufmann Publishers is an imprint of Elsevier. 30 Corporate Drive, Suite 400, Burlington, MA 01803, USA This book is printed on acid-free paper. ϱ Copyright © 2008 by Elsevier Inc. All rights reserved. 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Permissions may be sought directly from Elsevier’s Science & Technology Rights Department in Oxford, UK: phone: (+44) 1865 843830, fax: (+44) 1865 853333, E-mail: [email protected]. You may also complete your request online via the Elsevier homepage (http://elsevier.com),by selecting “Support & Contact”then “Copyright and Permission”and then “Obtaining Permissions.” Library of Congress Cataloging-in-Publication Data Liu, Dake, 1957- Embedded DSP processor design: application specific instruction set processors / Dake Liu. p. cm. – (The Morgan Kaufmann series in systems on silicon) Includes index. ISBN 978-0-12-374123-3 1. Embedded computer systems. 2. Signal processing–Digital techniques. 3. Digital integrated circuits. 4. Application-specific integrated circuits. I. Title. TK7895.E42D35 2008 621.39’16–dc22 2008012910 ISBN: 978-0-12-374123-3 For information on all Morgan Kaufmann publications, visit our website at www.mkp.com or www.books.elsevier.com Printed in the United States of America 0809101112 54321 “Liu: fm-p374123” — 2008/5/6 — 12:00 — page iv — #4 To Meiying and Angie “Liu: fm-p374123” — 2008/5/6 — 12:00 — pagev—#5 “Liu: fm-p374123” — 2008/5/6 — 12:00 — page vi — #6 Contents Preface ............................................................................... xix List of Trademarks and Product Names ............................................ xxv CHAPTER 1 Introduction 1 1.1 How to Read the Book.......................................... 1 1.2 DSP Theory for Hardware Designers........................... 5 1.2.1 Review of DSP Theory and Fundamentals ............ 5 1.2.2 ADC and Finite-Length Modeling ...................... 6 1.2.3 Digital Filters............................................ 8 1.2.4 Transform ............................................... 10 1.2.5 Adaptive Filter and Signal Enhancement .............. 12 1.2.6 Random Process and Autocorrelation ................. 14 1.3 Theory, Applications, and Implementations ................... 15 1.4 DSP Applications ................................................ 17 1.4.1 Real-Time Concept ..................................... 17 1.4.2 Communication Systems............................... 17 1.4.3 Multimedia Signal Processing Systems ................ 19 1.4.4 Review on Applications ................................ 23 1.5 DSP Implementations ........................................... 24 1.5.1 DSP Implementation on GPP .......................... 25 1.5.2 DSP Implementation on GP DSP Processors ......... 25 1.5.3 DSP Implementation on ASIP .......................... 26 1.5.4 DSP Implementation on ASIC.......................... 26 1.5.5 Trade-off and Decision of Implementations........... 28 1.6 Review of Processors and Systems............................. 29 1.6.1 DSP Processor Architecture ............................ 29 1.6.2 DSP Firmware .......................................... 30 1.6.3 Embedded System Overview .......................... 32 1.6.4 DSP in an Embedded System .......................... 34 1.6.5 Fundamentals of Embedded Computing.............. 35 1.7 Design Flow ..................................................... 36 1.7.1 Hardware Design Flow in General .................... 36 1.7.2 ASIP Hardware Design Flow ........................... 38 1.7.3 ASIP Design Automation................................ 40 1.8 Conclusions ..................................................... 43 Exercises......................................................... 44 References ....................................................... 45 vii “Liu: fm-p374123” — 2008/5/6 — 12:00 — page vii — #7 viii Contents CHAPTER 2 Numerical Representation and Finite-Length DSP 47 2.1 Fixed-Point Numerical Representation ........................ 47 2.1.1 An Intuitive Example ................................... 48 2.1.2 Fixed-Point Numerical Representation................ 50 2.1.3 Fixed-Point Binary Representation .................... 51 2.1.4 Integer Binary Representation......................... 52 2.1.5 Fractional Binary Representation...................... 53 2.1.6 Fixed-Point Operands .................................. 54 2.1.7 Integer or Fractional.................................... 55 2.1.8 Other Binary Data Formats ............................ 63 2.2 Data Quality Measure ........................................... 65 2.2.1 Noise, Distortion, Dynamic Range, and Precision..... 65 2.2.2 Quantitative Concept of Dynamic Range and Precision ................................................ 68 2.3 Floating-Point Numerical Representation ..................... 69 2.4 Block Floating-Point............................................. 73 2.5 DSP Based on Finite Precision.................................. 76 2.5.1 The Way of Quantization—Rounding and Truncation 76 2.5.2 Overflow Saturation and Guards ...................... 78 2.5.3 Requirements on Guards............................... 81 2.5.4 Execution Order........................................ 82 2.6 Examples of Corner Cases ...................................... 82 2.7 Conclusions ..................................................... 83 Exercises......................................................... 84 References ....................................................... 85 CHAPTER 3 DSP Architectures 87 3.1 DSP Subsystem Architecture.................................... 87 3.2 Processor Architecture.......................................... 88 3.2.1 Inside a DSP Subsystem ................................ 89 3.2.2 DSP (Memory Bus) Architecture....................... 91 3.2.3 Functional Description at Top Architecture Level .... 95 3.2.4 DSP Architecture Design ............................... 97 3.3 Inside a DSP Core ............................................... 101 3.3.1 The Datapath and Register Bus ........................ 101 3.3.2 MAC ..................................................... 101 3.3.3 ALU ...................................................... 103 3.3.4 Register File............................................. 104 3.3.5 Control Path ............................................ 105 3.3.6 Address Generator (AGU) .............................. 108 3.4 The Difference between GPP and ASIP DSP ................... 109 3.4.1 The Difference between Designing a GPP and ASIP DSP...........................................