WORCESTER POLYTECHNIC INSTITUTE DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NOISE ANALYSIS AND SIMULATION OF A SUB-PIXEL ANALOG TO DIGITAL VOLTAGE-TO-FREQUENCY CONVERTER FOR USE WITH IR FOCAL PLANE ARRAYS BY CURTIS BENSON COLONERO B.S., Pennsylvania State University, 1998 Submitted in partial fulfillment of the requirements for the degree Master of Science Worcester Polytechnic Institute 2006 i © Copyright by CURTIS BENSON COLONERO 2006 ii Approved by First Reader ________________________________________ Brian M. King Thesis Advisor, Assistant Professor of Electrical and Computer Engineering Second Reader ________________________________________ John A. McNeill Associate Professor of Electrical and Computer Engineering Third Reader ________________________________________ Fred J. Looft Professor and Department Head of Electrical and Computer Engineering iii Acknowledgements At Worcester Polytechnic Institute: Brian King, for being my thesis advisor, and for promoting additional exploration by asking the hard questions; John A. McNeill, for serving on my thesis committee; Fred J. Looft, for serving on my thesis committee; ECE Department Office, for always having the answers to my logistical questions; At MIT Lincoln Laboratory: Mike Kelly, for the motivation to explore my thesis topic; At Home: Kendra, my wife who showed unlimited patience and endless support during this process; Sofia, my daughter who always had a smile and open arms for me at the end of my day whether or not progress had been made. iv Abstract The performance of a dedicated A/D converter located beneath each pixel is explored in this thesis. Specifically, a voltage to frequency converter coupled with a direct injection amplifier designed for use with an IR focal plane array is analyzed. This versatile implementation of a Readout Integrated Circuit can be found applicable to a wide variety of imaging technologies. Noise performance of the conversion system is theoretically calculated, and is supported by SPICE simulations using valid CMOS SPICE models. It is shown that a 10 transistor sub-pixel voltage to frequency analog to digital converter will produce noise that is less than the input shot noise. Design considerations will be addressed to ensure continued performance as the scale of the imagers increase to large format arrays. v Table of Contents Acknowledgements .......................................................................................................... iv Abstract.............................................................................................................................. v List of Figures and Tables............................................................................................... ix List of abbreviations and acronyms .............................................................................xiii 1 Introduction................................................................................................................. 1 1.1 Applications....................................................................................................... 1 1.2 Transistor Process Information....................................................................... 2 1.3 Operational Characteristics............................................................................. 2 1.3.1 Photodiode and Direct Injection Amplifier Characteristics ................. 5 1.3.2 Conversion Rate........................................................................................ 6 1.4 Relation of time domain output to system noise ............................................ 7 1.5 Motivation and Goals ....................................................................................... 8 1.5.1 Limitations of Conventional Technologies ........................................... 11 2 Analysis of Noise in Voltage to Frequency Converters............................................ 16 2.1 First Order Noise Sources.............................................................................. 16 2.1.1 Photodiode Shot Noise ............................................................................ 16 2.1.2 Integration Capacitance kTC Noise...................................................... 19 2.1.3 MOSFET Noise ....................................................................................... 20 2.1.4 1/F Noise................................................................................................... 22 2.1.5 Jitter Noise............................................................................................... 24 2.1.6 Quantization Noise.................................................................................. 27 2.2 Second Order Noise Sources.......................................................................... 28 vi 2.2.1 Power Supply Noise (Inverter Threshold Noise) ................................. 28 2.2.2 Direct Injection Bias Noise..................................................................... 30 2.3 Total Noise ....................................................................................................... 31 2.3.1 Signal to Noise Ratio............................................................................... 32 2.3.2 Effective Number of Bits ........................................................................ 33 3 Transient Noise Simulations..................................................................................... 34 3.1 First Order Noise Source Simulations .......................................................... 35 3.1.1 Shot Noise Simulation............................................................................. 37 3.1.2 kTC Noise Simulation............................................................................. 40 3.1.3 MOSFET Noise Simulation.................................................................... 43 3.1.4 1/f Noise Simulation ................................................................................ 46 3.1.5 Jitter Noise Simulation ........................................................................... 49 3.1.6 Quantization Noise Simulation ...................................................................... 49 3.2 Second Order Noise Source Simulation........................................................ 49 3.2.1 Power Supply Noise (Inverter Threshold Noise) Simulation.............. 49 3.2.2 Direct Injection Bias Noise Simulation ................................................. 52 3.3 Total Noise Simulation ................................................................................... 54 4 Design Considerations for Voltage to Frequency Converters .................................. 57 4.1 Bypassing Power Supplies.............................................................................. 57 4.2 Cascode Transistor ......................................................................................... 57 4.3 Loading ............................................................................................................ 58 5 Summary................................................................................................................... 58 6 Appendix A: Mobility Ratio Calculation................................................................. 61 vii 7 Appendix B: Minimum Size Inverter Threshold ..................................................... 62 8 Appendix C: Integration Node Capacitance ............................................................ 64 9 Appendix D: Transient Noise Source MATLAB M-File ........................................ 66 10 Appendix E: Transistor 3 Mismatch Calculations............................................. 69 11 Appendix F: Voltage-To-Frequency Converter Schematic ................................. 71 viii List of Figures and Tables Figure 1-1 Voltage-To-Frequency Converter ..................................................................... 3 Figure 1-2 Voltage-To-Frequency Transient Operation..................................................... 4 Figure 1-3 Modeled Photodiode and Direct Injection Amplifier........................................ 6 Figure 1-4 Conventional FPA........................................................................................... 10 Figure 1-5 FPA using Voltage-To-Frequency Converter ................................................. 11 Figure 1-6 Integration Capacitor Comparison .................................................................. 13 Figure 1-7 Field of View Improvement............................................................................ 15 Figure 2-1 Photodiode Shot Noise.................................................................................... 18 Figure 2-2 kTC Noise ....................................................................................................... 20 Figure 2-3 MOSFET Noise............................................................................................... 22 Figure 2-4 Flicker Noise Parameters ................................................................................ 23 Figure 2-5 1/f Noise.......................................................................................................... 24 Figure 2-6 Jitter Noise Variables ...................................................................................... 26 Figure 2-7 Jitter Noise ...................................................................................................... 27 Figure 2-8 Quantization Noise.........................................................................................