A Design for an RGB LED Driver with Independent PWM Control and Fast Settling Time by Awo Dede 0. Ashiabor Submitted to the Department of Electrical Engineering and Computer Science in Partial Fulfillment of the Requirements for the Degree of Master of Engineering in Electrical Engineering and Computer Science at the Massachusetts Institute of Technology May, 2007 ©2007 Massachusetts Institute All rights reserve( Author Department of Electrical EL May 25, 2007 Certified bv [John ily, Seniojn- ign Engineer) VI-A Company Thesis Supervisor Certified by vid Perreault] ;is Supervisor Accepted by Arthur C. Smith Professor of Electrical Engineering Chairman, Department Committee on Graduate Theses MAS$ACHUSETTS INSTiTUTE, OF TECHNOLOGY BARKER OCT 0 3 2007 LIBRARIES A Design for an RGB LED Driver with Independent PWM Control and Fast Settling Time By Awo Dede 0. Ashiabor Submitted to the Department of Electrical Engineering and Computer Science on May 28, 2007, in partial fulfillment of the requirements for the degree of Master of Engineering in Electrical Science and Engineering. Abstract A small sized and efficient method to power RGB LEDs for use as backlights in flat panel displays is explored in this thesis. The proposed method is to drive a parallel switched connection of LEDs with a single Average Mode Controlled buck regulator. Specifications for the switching regulator and control circuitry are described. The application circuit demonstrates current settling times between 7ps and 30ps at a switching frequency of 290kHz. Current settling is improved at higher switching frequencies, with settling times approaching a 2ps to 4ps range at 1MHz switching. M.I.T. Thesis Supervisor: Prof. David Perreault VI-A Company Thesis Supervisor: John Tilly (Linear Technology Corporation) I Table of Contents 1. Introduction ....................................................................................... 7 a. Display Technologies of Today....................................................7 b. The use of LEDs in Displays...........................................................9 c. A bout this Thesis........................................................................9 i. Minimizing the settling time of a Multiple LED driver....................9 ii. Other performance criteria................................................12 iii. Thesis Organization........................................................14 2. Overview of Design Strategies...............................................................15 a. Theoretical Solutions................................................................ 15 b. Commercial Solutions.................................................................24 3. Systems and Specifications................................................................28 4. Design and Simulation.........................................................................30 a. Average Current Mode Controlled LED Driver................................30 b. Improvements to ACMC Controlled LED Driver..............................38 c. Modeling of External Components...............................................54 d. Modeling of Power Dissipation......................................................54 5. Testing ....................................................................................... ..55 a. Measurement Techniques ......................................................... 57 i. Settling tim e................................................................ 57 ii. E fficiency....................................................................58 b. Performance on Breadboard......................................................59 i. Settling tim e................................................................ 63 ii. E fficiency....................................................................69 c. Solution Integration in I.C. ........................................................ 72 6. C onclusion ................................................................................... 74 a. Sum m ary............................................................................ 74 b. C ontributions....................................................................... 74 c. Future W ork......................................................................... 75 d. Acknowledgements................................................................75 7. B ibliography................................................................................. 76 8. A ppendix I.................................................................................... 78 9. A ppendix II................................................................................... 80 10. A ppendix III................................................................................... 82 2 Table of Figures 1.1: DLP incorporating the fast current settling multiple LED driver......................5 1.2: Fast settling output current allows faster frequency, a higher refresh rate and better contrast pictures on DLP screen................................................................5 1.3: Traditional Multiple LED driver has distinct drivers encapsulated into one chip......7 1.4: Proposed Multiple LED driver with one output port serving multiple LEDs..........7 2.1: Proposed Multiple LED driver with one output port serving multiple LEDs..........9 2.2: 2-phase Buck converter. .................................................................. 11 2.3: Waveforms of the 2-phase Buck converter.............................................12 2.4: Basic structure and operation of FRDB converter.....................................13 2.5: Average Current Mode buck regulator.....................................................15 2.6: The principal difference between this current mode regulator and the voltage mode circuit is in the source of the modulating ramp. ............................................. 16 2.7: LEDs driven by separate converters......................................................19 2.8: Parallel topology............................................................................ 20 2.9: Series T opology................................................................................21 3.1: Multiple LED driver.......................................................................22 4.1a: Schematic of Average Current Mode Controlled LED Driver. ........................ 25 4.1b: Block diagram describing system during a reference current step. ................. 26 4.1c: Block diagram describing system during a load step........................... ........ 26 4.2: Transfer function of PWM comparator....................................................27 4.3: Bode plot of open-loop buck and ACMC compensated open-loop gain ............. 30 4.4: LED current settles to 5% of final value in 7ps in response to a reference current step .............................................................................................. .. 3 1 3 4.5: Transient response to a step in output current. Output current settles within 27pis to 5% of final value. ............................................... .... 31 4.6: For a 2.4A step in output current, settling time is 80ps ............................... 32 4.7: The critical inductance design scheme keeps the small signal settling time at 7ps.. 34 4.8: After applying the critical inductance technique, the settling time for large output reference current steps improves from 80pts to 73ps. ........................................ 34 4.9 After applying the critical inductance rule, the output current settling time stays at 27ps. ............................................................... .... 35 4.10: The anti-windup circuit reduces large reference current step settling time from 73pis to 22ps. .......................................................... 36 4.11: Slowly ramping up the reference current also reduces settling time from 73ps to 24ps. ..................................................- --......................... 37 4.12: For a 2.4A reference current step, reducing output inductor to 20pH lowers the settling tim e further to 17ps. .................................................................... 38 4.13: Switching at 1MHz results in a 2ps settling time for a 600mA step in reference cu rren t. ......................................................... ................................... 4 2 4.14: And for a 2.4A step in reference current, settling time is 4ps. ........................ 42 4.15: At 1MHz switching, output current settling time is 7ps. ............................... 43 5.1: PCB board of initial design. ............................................................. 49 5.2: Full circuit schematic of the prototype system........................................50 5.3: The large ripple on the output current makes it difficult to spot the 5% settling time. After smoothing output current with a moving average, settling time is easily read off plot as 9p s. ...................................................................................... 52 5.4: RGB LEDs produce a white color. ...................................................... 54 5.5: RGB LEDs produce a green color........... ............................................. 54 5.6: Transient performance of breadboard circuit for a reference current step.............55 5.7: SPICE simulation of experiment of Figure 5.6..........................................55 5.8: Breadboard circuit yields a 30ps load step settling time. ...............................