Vitis Unified Software Platform Documentation Application Acceleration Development UG1393 (v2019.2) February 28, 2020 Revision History Revision History The following table shows the revision history for this document. Section Revision Summary 02/27/2020 Version 2019.2 Update to 2019.2 documentation Removed the Data Center Accelerator Card Platforms chapter. For specifications of each accelerator card and available target platforms, refer to Alveo Data Center Accelerator Card Platforms User Guide (UG1120). 12/19/2019 Version 2019.2 Update to 2019.2 documentation Profile_Summary report additions and content update xbutil status update xbutil flash deprecation message Updates to support the following Alveo™ accelerator cards: • U50 • U200 and U25 QDMA 11/11/2019 Version 2019.2 Vitis 2019.2 Software Platform Release Notes Updated content. Vitis Software Platform Installation Updated content. Removed licensing information. 10/30/2019 Version 2019.2 Entire document Updated for public release with additional content and updated figures. Added new chapters. • Vitis 2019.2 Software Platform Release Notes • xbmgmt Utility • Understanding the Vitis Analyzer • Data Center Accelerator Card Platforms • Section VIII: Embedded Processor Platform Development • Section IX: Migrating Embedded Processor Applications from SDSoC to Vitis 10/01/2019 Version 2019.2 Initial release N/A UG1393 (v2019.2) February 28, 2020Send Feedback www.xilinx.com Vitis Application Acceleration Development 2 Table of Contents Revision History...............................................................................................................2 Section I: Introduction to the Vitis Unified Software Platform..........12 Chapter 1: Vitis 2019.2 Software Platform Release Notes.................13 What's in the Vitis Software Platform................................................................................13 Supported Platforms........................................................................................................... 14 Changed Behavior................................................................................................................14 Known Issues........................................................................................................................15 Chapter 2: Installation.......................................................................................... 16 Installation Requirements...................................................................................................16 Vitis Software Platform Installation................................................................................... 18 Chapter 3: Introduction to the Vitis Environment for Acceleration............................................................................................................23 Introduction and Overview................................................................................................. 23 Execution Model...................................................................................................................25 Build Process.........................................................................................................................27 Tutorials and Examples....................................................................................................... 29 Chapter 4: Methodology for Accelerating Applications with the Vitis Software Platform........................................................................... 31 Introduction.......................................................................................................................... 31 Methodology for Architecting a Device Accelerated Application...................................34 Methodology for Developing C/C++ Kernels.................................................................... 47 Section II: Developing Applications................................................................... 61 Chapter 5: Programming Model...................................................................... 62 Device Topology................................................................................................................... 62 Kernel Properties................................................................................................................. 62 UG1393 (v2019.2) February 28, 2020Send Feedback www.xilinx.com Vitis Application Acceleration Development 3 Chapter 6: Host Application............................................................................... 66 Setting Up the OpenCL Environment................................................................................ 66 Executing Commands in the FPGA.....................................................................................71 Post- Processing and FPGA Cleanup..................................................................................82 Summary............................................................................................................................... 82 Chapter 7: C/C++ Kernels..................................................................................... 84 Data Types.............................................................................................................................84 Interfaces.............................................................................................................................. 87 Loops..................................................................................................................................... 90 Dataflow Optimization.........................................................................................................96 Array Configuration............................................................................................................. 99 Function Inlining................................................................................................................ 103 Summary............................................................................................................................. 103 Chapter 8: RTL Kernels........................................................................................ 105 Requirements of an RTL Kernel........................................................................................105 RTL Kernel Development Flow..........................................................................................108 RTL Kernel Wizard.............................................................................................................. 114 Design Recommendations for RTL Kernels.................................................................... 131 Chapter 9: Streaming Connections.............................................................. 136 Streaming Data Between the Host and Kernel (H2K)....................................................136 Streaming Data Transfers Between Kernels (K2K)........................................................ 141 Free-running Kernel...........................................................................................................143 Chapter 10: OpenCL Kernels............................................................................ 145 Chapter 11: Best Practices for Acceleration with Vitis..................... 147 Section III: Building and Running the Application.................................. 149 Chapter 12: Setting up the Vitis Environment.......................................150 Chapter 13: Build Targets.................................................................................. 151 Software Emulation............................................................................................................151 Hardware Emulation..........................................................................................................152 System Hardware Target...................................................................................................152 UG1393 (v2019.2) February 28, 2020Send Feedback www.xilinx.com Vitis Application Acceleration Development 4 Chapter 14: Building the Host Program.................................................... 154 Compiling and Linking for x86......................................................................................... 154 Compiling and Linking for Arm........................................................................................ 155 Chapter 15: Building the FPGA Binary........................................................157 Compiling Kernels with Vitis Compiler............................................................................ 158 Compiling Kernels Directly in Vivado HLS.......................................................................159 Packaging RTL Kernels with package_xo.........................................................................163 Linking the Kernels............................................................................................................ 164 Controlling Report Generation.........................................................................................174 Chapter 16: Directory Structure.................................................................... 176 Output Directories from the v++ Command...................................................................176 Output Directories from the Vitis IDE..............................................................................177 Chapter 17: Running an Application..........................................................