State University of New York at Stony Brook ESE 314 Electronics Laboratory B Department of Electrical and Computer Engineering Fall 2010 © Leon Shterengas ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ Lab 4: Frequency Response of CG and CD Amplifiers. 1. OBJECTIVES Understand the role of input and output impedance in determining the gain of FET amplifiers: Measure the frequency response of CG amplifier; Measure the frequency response of CD amplifier. 2. INTRODUCTION 2.1. Frequency response of CG and CD amplifiers. In previous lab we have studied the gain of the CS amplifier paying special attention to the effect of load resistance and capacitance on amplifier bandwidth. By connecting capacitance to the load, we were essentially adding a low-pass filter at the output on CS amplifier. We have intentionally minimized the contribution of the parasitic low-pass-filter at the input to avoid the discussion of associated Miller effect. We did that by taking measured value of the gate-to-source signal voltage for an input voltage. Strictly speaking the gate material of the MOSFET has finite resistance and even in the experimental arrangement of lab 03 one cannot afford to unconditionally forget about low-pass-filter at the input. In this lab we will study that input low-pass-filter. We will also discuss the topologies of the FET amplifiers that can help to minimize the bandwidth limitations associated with the low-pass-filters either at the input or at the output. Figure 1a shows the generic CS amplifier with realistic signal source having finite output resistance. The equivalent circuit in Figure 1b can be used to predict high 3dB frequency fH. In this equivalent circuit the Miller effect is already taken into account and one can see an equivalent capacitance CM in parallel with input capacitance CGS. In our experiments we are not using any RG so in our particular case Rsig = Rsig’. Equivalent load resistance RL’ = (r0||RD||RL). If open circuit voltage gain is being measured then RL = ∞ and RL’ = (r0||RD). (a) (b) Figure 1. Low-pass-filter at the input of CS amplifier (composed of Rsig’ and CGS||CM) will limit the amplifier bandwidth (BW) and corresponding high 3B frequency can be estimated as: 1 1 f H ' ' ' . (1) 2 π R sig CGS || C M 2 π R sig CGS 1 g m R L CGD 1 State University of New York at Stony Brook ESE 314 Electronics Laboratory B Department of Electrical and Computer Engineering Fall 2010 © Leon Shterengas ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ Miller effect amplifies the role of CGD and it is often the CM rather than CGS that limits the BW of CS amplifier. Common Gate (CG) amplifier does not suffer from Miller effect since no capacitive coupling (well, almost no) is present between input and output. Figure 2a shows CG circuit topology for signals only, i.e. power supplies are omitted but assumed. (a) (b) Figure 2. Figure 2b shows an equivalent circuit with r0 ignored and gmb, i.e. “back-gate” transconductance, shown. In integrated circuit (IC) CG amplifiers, gate and back-gate transconductances act together since source-to-gate and source-to-bulk signal voltages are equal to each other (bulk is connected to power supply voltage, i.e. ground for signal). In our lab experiments we should not care about gmb since we often connect bulk to source for simplicity. Effective low-pass-filter at the input of CG amplifier has 3dB cut-off: 1 f H input . (2) 1 2 π R S || CGS g m g mb The low-pass-filter at the output will have 3dB cut-off at (often dominant pole in many applications): 1 f H output . (3) 2 π CGD CL R L Here RL is an equivalent load, i.e. including RD. Both poles due to input and output low-pass-filters are often higher then fH for CS amplifier (see equation (1)). Hence, BW of CG amplifier is extended as compared to CS one. However, low input resistance of CG amplifier can reduce midband voltage gain especially for signal sources with large internal resistance (observe voltage divider made of RS and 1/(gm + gmb)). Hence we can expect (in our experiments for CG amplifier) wider BW but lower midband gain as compared to CS one. In special case when load capacitance CL limits the BW of the CS amplifier the change of the circuit topology to CG one would not improve BW. Product of RL and CL will essentially determine the time constant of the output low-pass-filter for both CS and CG amplifiers. However, one can use voltage buffer with reduced output resistance. Namely, one can use Common Drain (CD) configuration. Figure 3a shows schematically an IC realization of CD amplifier circuit. Again, in general, bulk is on ground for signal, but we will just connect it to source to eliminate the body effect discussion at all. Input is applied to gate and output is collected at source. Drain is grounded for signals. Equivalent circuit is shown at 2 State University of New York at Stony Brook ESE 314 Electronics Laboratory B Department of Electrical and Computer Engineering Fall 2010 © Leon Shterengas ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ Figure 3b. The equivalent circuit includes extra elements, namely, load capacitance CL and signal source internal resistance. (a) (b) Figure 3. In our lab we will be interested in performance of CD (source follower) amplifier as a voltage buffer with small output resistance. Hence we will measure input voltage directly at gate (this is equivalent to having Rsig = 0) and use no RL to minimize roles of CGS and CGD. Then the high 3dB frequency will be mainly determined by CG equivalent output resistance and load capacitance: 1 1 g m f H . (4) 2 π R C 1 2 π C out L L 2 π r0 || CL g m As long as 1/gm is smaller than RL (equation (3)) source follower will have extended BW, i.e. CG configuration is less sensitive to load capacitance than CS and CG ones. 3. PRELIMINARY LAB 3.1. Assume Rsig = 10 kΩ, CGS = 10 pF and CGD = 1 pF. Using parameters of CS amplifier from laboratory experiments 2 and 3 find the corresponding BW of open-circuit voltage gain. 3.2. Calculate the high 3 dB frequency for open-circuit voltage gain of CG amplifier with the same bias, RD, RS = Rsig as CS from 3.1. 3.3. Calculate the high 3dB frequencies for CS and CD amplifiers each loaded with 300 pF capacitor. Assume RL = Rsig = 0. All necessary parameters take from your lab 2 and 3 data. 3 State University of New York at Stony Brook ESE 314 Electronics Laboratory B Department of Electrical and Computer Engineering Fall 2010 © Leon Shterengas ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ 4. EXPERIMENT (we are interested in high 3dB frequency, so start measurements from midband frequencies, i.e. skip measuring the low frequency part of magnitude responses to save time) 4.1. Build the CS circuit shown below using VDD = VSS = 5 V. Select 50 kΩ potentiometer and adjust it to obtain 250 µA bias current for M3. For CS and RD use values from lab 2 or 3. Select RS = 10 kΩ. Use oscilloscope to visualize both input and output sinusoidal waveforms. Perform measurements of the magnitude response. RD VDD Rsig M3 R Vout Vin 0 0 VSS 0 M1 M2 CS 0 Present the measurement results in the form of table. Plot the experimental results. Compare high 3 dB frequency with the value measured in 4.1 part of lab 03. 4.2. Adjust your circuit to obtain CG amplifier. Namely, ground the gate and connect function generator through 10 kΩ RS and CS to source of M3 (see circuit below). Perform measurements of the magnitude response. RD VDD M3 R Vout 0 CS 0 0 VSS Rsig Vin M1 M2 0 Present the measurement results in the form of table. Plot the experimental results. Explain difference in midband gain and high 3dB frequency between CG and CS amplifiers. 4 State University of New York at Stony Brook ESE 314 Electronics Laboratory B Department of Electrical and Computer Engineering Fall 2010 © Leon Shterengas ¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯ 4.3. Assemble CD amplifier. Namely, remove RD and connect M3 drain directly to VDD, apply input signal to gate of M3 (see circuit below) and measure output at source. Perform measurements of the magnitude response. VDD M3 R Vin 0 VSS 0 Vout M1 M2 0 Present the measurement results in the form of table. Plot the experimental results. Comment on values of midband gain and high 3 dB frequency. 4.4. Augment circuit from 4.3 with load capacitance CL = 300 pF. Perform measurements of the magnitude response. VDD M3 R Vin 0 VSS 0 M1 M2 CL Vout 0 Present the measurement results in the form of table. Plot the experimental results. Explain change in high 3dB frequency value. 5. REPORT The report should include the lab goals, short description of the work, the experimental and simulated data presented in plots, the data analysis and comparison followed by conclusions. Please follow the steps in the experimental part and clearly present all the results of measurements. Be creative; try to find something interesting to comment on. 5.