Analog Design Journal Signal Chain Using noise-gain shaping to stabilize fully-differential amplifiers By Jacob Freet Applications Engineer, High-Speed Amplifiers Introduction Figure 1. Generic SAR-ADC driver circuit using Amplifier stability is always a potential area of concern the THS4551 FDA when developing application circuits for high-speed ampli- R fiers, such as SAR-ADC drivers. This is particularly true VIN1 G1 RF1 when using amplifiers to drive capacitive loads, such as R the input to a successive-approximation-register (SAR) VS+ ISO analog-to-digital converters (ADCs), or when using decompensated amplifiers that are not unity-gain stable. – To + With many high-speed, high-resolution SAR ADCs with SAR VOCM FDA CL fully-differential inputs, fully-differential amplifiers (FDAs) – ADC + are commonly used to drive the ADCs. PD This article describes a technique to stabilize potentially VS– VS+ R unstable FDA application circuits by using capacitors to VIN2 ISO shape the noise-gain frequency response. The examples R R given reference an FDA driving a high-capacitive load, but G2 F2 the technique is applicable for any FDA application or inverting voltage-feedback amplifier configuration. Figure 1 shows a typical application circuit of an FDA driving a Figure 2. A 130-MHz FDA that is unity-gain stable with a single-pole open-loop response SAR-ADC input without any added circuitry to stabilize the amplifier. VIN1 R R Stability theory It’s possible to analyze an FDA’s stability much like a VS+ standard amplifier in an inverting configuration. The key – parameter used to determine the amplifier’s circuit stabil- + FDA C/L 2 ity is the loop-gain response variation over frequency, – which can be used to extract the phase margin of the + circuit. The loop gain is defined as the amplifier’s open- loop gain response (A ) multiplied by the feedback factor VS– OL VIN2 (β), which is created by the combination of the feedback elements. The derivation of the loop-gain, open-loop-gain R R and feedback-factor responses are beyond the scope of (a) Closed-loop circuit this article, but do exist in TI Precision Labs,[1] as well as many standard amplifier textbooks. 200 AOL Magnitude For analytical simplicity, this article assumes that the Noise Gain Magnitude 150 amplifier used is unity-gain stable and has a single-pole Loop Gain Magnitude open-loop frequency response, as shown in Figure 2. Loop Gain Phase However, the theory and methods discussed are applicable 100 to amplifiers with multipole responses like decompensated 50 amplifiers. To calculate the feedback factor, determine the transfer 0 equation from the point of the amplifier’s output refer- enced to its non-inverting input. The inverse of the feed- –50 back factor is known as the noise gain of the amplifier Gain (dB) / Phase (degrees) circuit, and is often used to illustrate how the feedback –100 network will amplify any voltage noise present at the 10 100 1 k 10 k 100 k 1 M 10 M 100 M 1 G Frequency (Hz) (b) Loop-gain response Texas Instruments 1 ADJ 4Q 2017 Analog Design Journal Signal Chain amplifier’s inputs. With both the open-loop response and Although the series output resistors added to the ampli- the feedback factor (or noise gain), either Equation 1 or fier’s output help stabilize the circuit in the presence of a Equation 2 calculates the loop gain. large capacitive load, they can be impractically large when used as the only method of stabilizing the circuit. Resistors LoopGain =A × β (1) OL that are too large will increase the settling time of the A filter and lower the filter frequency created by the combi- LoopGain = OL (2) nation of output resistors and the charge-bucket capacitor. NoiseGain Circuit performance can be limited if the output-filter’s The loop-gain response is typically a complex frequency cutoff frequency is lower than the required system band- response consisting of both real and imaginary compo- width or the filter settling time is too slow. nents. Obtaining the phase margin requires extraction of both the magnitude and phase responses from the Noise-gain shaping technique complex loop-gain response. With both the magnitude and Rather than adding additional output resistance, it’s possi- phase response, calculating the change of loop-gain phase ble to shape the noise gain of the amplifier with minimal response at the frequency where the loop-gain magnitude adverse effect to the circuit, using only additional input is equal to unity (0 dB) obtains the phase margin. If the and feedback capacitors. This technique does “peak” the value of the phase is less than 180 degrees, then the noise gain at a certain frequency, which will potentially circuit is theoretically stable. The phase margin is calcu- add additional integrated noise to the circuit. With careful lated by subtracting the measured value of the phase from design, however, the frequency of the peaking can occur 180. Technically, any phase margin greater than zero is primarily after the output-filter bandwidth, thus adding considered stable, although unpredicted secondary effects little additional noise to the final sampled signal. often come into play that can push the circuit into instabil- An FDA needs three capacitors total for noise-gain ity. To account for unpredicted effects, the phase margin shaping, one connected in parallel with each of the two should be at least 30 degrees, however 60 degrees is pref- feedback resistors and one connected differentially across erable to achieve a flat frequency response. Figure 2 the inputs. To successfully use this technique, values must shows the open-loop gain, noise-gain and loop-gain be chosen carefully to minimize added noise while keeping responses for a unity-gain inverting configuration. the device stable. Although it is possible to theoretically Note that the example unity-gain amplifier circuit in derive the entire transfer function of the loop gain to Figure 2 is very stable in its configuration, with 90 degrees predict the value of the capacitors, practically it is much of phase margin. However, real application circuits are easier to use a heuristic approach—tuning the values until never ideal and include other components that affect the desired performance is obtained. amplifier stability. In the case of driving SAR ADCs, the biggest effect on stability is the required charge-bucket capacitor, which is typically 20 Figure 3. Loop gain with various capacitive loads times the value of the internal ADC sampling capacitor. Although series resistors are 150 included in front of the capacitor to create a CL = 100 pF resistor-capacitor (RC) filter—which helps 100 CL = 1 nF isolate some of the capacitance—these resis- CL = 10 nF tors are sometimes not enough to entirely Magnitude CL = 100 nF 50 isolate the effect of the charge-bucket capaci- Responses tor. Adding too much capacitance to the amplifier output has the effect of adding a 0 second pole into the loop-gain response. If the second pole frequency becomes low –50 enough such that it is located below the unity-gain crossover frequency, it will intro- –100 Phase <1° P 3° 10° 30° duce an additional phase shift into the response Gain (dB) / Phase (degrees) Responses PM PM PM that can cause the phase margin (PM) to –150 M reduce to a point of instability. Figure 3 shows the loop-gain responses from the same theo- –200 retical amplifier as Figure 2, with additional 10 100 1 k 10 k 100 k 1 M 10 M 100 M 1 G capacitance added to the amplifier output. Frequency (Hz) Texas Instruments 2 ADJ 4Q 2017 Analog Design Journal Signal Chain Figure 4 illustrates the effect of shaping the noise gain pole in the loop-gain response. Choose the feedback value of the circuit and how it stabilizes the loop-gain response. so that the noise gain flattens out and crosses above the The input capacitor adds a pole to the response that drops second pole in the loop-gain response. If a value cannot be the magnitude value faster to the unity-gain value. The found for the feedback capacitor that satisfies both crite- feedback capacitors add a zero that helps extend the ria, then increase the input capacitor until the response phase response past the unity-gain value. The summary of stabilizes. One approach is to choose a very large input the effect is that the phase is extended past the new capacitor from the start, but that would cause the noise unity-gain crossing to keep the circuit stable. gain to peak far earlier than necessary, thus adding unnec- It is best to first pick an input capacitor value that essary noise to the circuit. places a zero in the noise-gain response before the second Figure 4. Loop gain of circuit with a 1-nF capacitive load and stabilized response with CIN = 10 nF and CFB = 250 pF 150 Original Loop Gain New Noise Gain 100 New Loop Gain Magnitude 50 Responses 0 Input Capacitor Feedback Pole –50 Capacitor Zero –100 Phase 9° Gain (dB) / Phase (degrees) Responses PM –150 34° PM –200 10 100 1k 10k 100k 1M 10M 100M Frequency (Hz) Texas Instruments 3 ADJ 4Q 2017 Analog Design Journal Signal Chain TINA-TI™ software simulation Figure 5. TINA-TI™ software schematics The easiest way to practically use the noise-gain shaping technique is with a SPICE-based simulator Cf1 22p such as TINA-TI™ software and an accurate ampli- fier model. TI’s THS4551 FDA is a high-speed differ- RG1 4.99k Rf1 1k ential SAR ADC driver that makes a great choice for Vin- stabilizing an ADC driver circuit.