(Saturated) MOSFET Small-Signal Model Transconductance

(Saturated) MOSFET Small-Signal Model Transconductance

11 (Saturated) MOSFET Small-Signal Model Transconductance ■ Concept: find an equivalent circuit which interrelates the incremental changes The small-signal drain current due to vgs is therefore given by in iD, vGS, vDS, etc. for the MOSFET in saturation id = gm vgs. vGS = VGS + vgs , iD = ID + id -- we want to find id = (?) vgs D iD = ID + id G We have the functional dependence of the total drain current in saturation: + + B VDS = 4 V µ 2 λ vgs _ iD = n Cox (W/2L) (vGS - VTn ) (1 + nvDS) = iD(vGS, vDS) _ + S Solution: do a Taylor expansion around the DC operating point (also called the VGS = 3 V_ quiescent point or Q point) defined by the DC voltages Q(VGS, VDS): 2 ∂ ∂ 600 iD 1iD 2 i =I ++()v --- ()v +… D D ∂ gs 2 gs 500 vGS 2∂ i v = V + v Q v GS d GS GS gs Q iD 400 Q vGS = VGS = 3 V (µA) 300 If the small-signal voltage is really “small,” then we can neglect all everything past gm = id / vgs the linear term -- 200 100 ∂ iD i ==I + ()v I+ gv D D ∂ gs D mgs 1 2 3 456 vGS Q VDS (V) where the partial derivative is defined as the transconductance, gm. EE 105 Fall 1998 EE 105 Fall 1998 Lecture 11 Lecture 11 Another View of gm Transconductance (cont.) * Plot the drain current as a function of the gate-source voltage, so that ■ Evaluating the partial derivative: the slope can be identified with the transconductance: W g =µ C ----- ()V – V ()1+ λV m n oxL GS Tn nDS D iD = ID + id G + ■ In order to find a simple expression that highlights the dependence of gm on the + B VDS = 4 V DC drain current, we neglect the (usually) small error in writing: vgs _ _ + S VGS = 3 V_ 2I µW D gm==2nCox----- ID -------------------------- L VGS – VTn iD(vGS, VDS = 4 V) 600 µ µ µ -2 500 For typical values (W/L) = 10, ID = 100 A, and nCox = 50 AV we find that id gm = id / vgs iD 400 Q (µA) 300 µ -1 gm = 320 AV = 0.32 mS 200 100 123456 vGS (V) vGS = VGS = 3 V vGS = VGS + vgs EE 105 Fall 1998 EE 105 Fall 1998 Lecture 11 Lecture 11 (Partial) Small-Signal Circuit Model Output Conductance/Resistance ■ How do we make a circuit which expresses id = gm vgs ? Since the current is not ■ We can also find the change in drain current due to an increment in the drain- across its “controlling” voltage, we need a voltage-controlled current source: source voltage: ∂i D µ W ()2λ≅λ go ==∂------------ n C ox------ VGS – VTn nnID vDS 2L Q gate id The output resistance is the inverse of the output conductance + drain g v vgs m gs _ 11 source ro==----- λ------------ _ gon I D The (partial) small-signal circuit model with ro added looks like: id = gm vgs + (1/ro)vds gate drain + + id gmvgs r vgs o vds _ source _ EE 105 Fall 1998 EE 105 Fall 1998 Lecture 11 Lecture 11 MOSFET Capacitances in Saturation Complete Small-Signal Model fringe electric field lines gate ■ All these capacitances are “patched” onto the small-signal circuit schematic source drain containing gm and ro ... gmb is open-circuited for EECS 105 since vbs = 0 V. n+ n+ C q (v ) sb N GS C depletion overlap L db region overlap LD D Cgd i gate d + drain v g v gs Cgs Cgb gmvgs mb bs ro _ source _ vbs Csb Cdb + bulk In saturation, the gate-source capacitance contains two terms, one due to the channel charge’s dependence on vGS [(2/3)WLCox] and one due to the overlap of µ gate and source (WCov, where Cov is the overlap capacitance in fF per m of gate width) 2 C = --- WLC + WC gs 3 ox ov In addition, there is the small but very important gate-drain capacitance (just the overlap capacitance Cgd = Cov) There are depletion capacitances between the drain and bulk (Cdb) and between source and bulk (Csb). Finally, the extension of the gate over the field oxide leads to a small gate-bulk capacitance Cgb. EE 105 Fall 1998 EE 105 Fall 1998 Lecture 11 Lecture 11 p-channel MOSFETs p-channel MOSFET Models ■ Structure is complementary to the n-channel MOSFET ■ DC drain current in the three operating regions: -ID > 0 ■ In a CMOS technology, one or the other type of MOSFET is built into a well -- a deep diffused region -- so that there are electrically isolated “bulk” regions in the ( ≤ ) same substrate –ID = 0 A VSG –VT µ ()⁄ []()⁄ ()λ( ≥ , ≤ ) –ID = pCox WL VSG +VTp –VSD 2 1+ pVSD VSD VSG –VTp VSD VSG + VTp µ ()⁄()()2()λ (≥ , ≥ ) –ID =pCox W 2L VSG + VTp 1+ pVSD VSG –VTp VSD VSG + VTp ■ The threshold voltage with backgate effect is given by: n-channel p-channel MOSFET MOSFET V =V –γ ()()–V + 2φ –2φ Tp TOp p SB n n Numerical values: µ µ µ -2 pCox is a measured parameter. Typical value: pCox = 25 AV A A –1 0.1µmV λ≈ -------------------------- pL (a) V = -0.7 to -1.0 V, which should be approximately -V for a well-controlled common bulk contact for isolated bulk contact with Tp Tn all n-channel MOSFETs p-channel MOSFET CMOS process (to ground or to the − supply) shorted to source + + p+ n+ source n+ drain p drain p+ source n n well (b) p-type substrate EE 105 Fall 1998 EE 105 Fall 1998 Lecture 11 Lecture 11 p-channel MOSFET small-signal model ■ the source is the highest potential and is located at the top of the schematic source + r C gmvsg gmbvsb o vsg gs C gd −i _ gate d vsb drain C gb Csb _ Cdb bulk EE 105 Fall 1998 Lecture 11.

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