SYCLTM Provisional Specification SYCL integrates OpenCL devices with modern C++ using a single source design Version 2.2 Revision Date: – 2016/02/15 Khronos OpenCL Working Group — SYCL subgroup Editor: Maria Rovatsou Copyright 2011-2016 The Khronos Group Inc. All Rights Reserved Contents 1 Introduction 13 2 SYCL Architecture 15 2.1 Overview . 15 2.2 The SYCL Platform and Device Model . 15 2.2.1 Platform Mixed Version Support . 16 2.3 SYCL Execution Model . 17 2.3.1 Execution Model: Queues, Command Groups and Contexts . 18 2.3.2 Execution Model: Command Queues . 19 2.3.3 Execution Model: Mapping work-items onto an nd range . 21 2.3.4 Execution Model: Execution of kernel-instances . 22 2.3.5 Execution Model: Hierarchical Parallelism . 24 2.3.6 Execution Model: Device-side enqueue . 25 2.3.7 Execution Model: Synchronization . 25 2.4 Memory Model . 26 2.4.1 Access to memory . 27 2.4.2 Memory consistency . 28 2.4.3 Atomic operations . 28 2.5 The SYCL programming model . 28 2.5.1 Basic data parallel kernels . 30 2.5.2 Work-group data parallel kernels . 30 2.5.3 Hierarchical data parallel kernels . 30 2.5.4 Kernels that are not launched over parallel instances . 31 2.5.5 Synchronization . 31 2.5.6 Error handling . 32 2.5.7 Scheduling of kernels and data movement . 32 2.5.8 Managing object lifetimes . 34 2.5.9 Device discovery and selection . 35 2.5.10 Interfacing with OpenCL . 35 2.6 Anatomy of a SYCL application . 36 2.7 Memory objects . 37 2.8 SYCL for OpenCL Framework . 38 2.9 SYCL device compiler . 39 2.9.1 Building a SYCL program . 39 2.9.2 Naming of kernels . 40 2.10 Language restrictions in kernels . 40 2.10.1 SYCL Linker . 41 2.10.2 Functions and datatypes available in kernels . 41 2.11 Execution of kernels on the SYCL host device . 41 3 SYCL Runtime Library 42 3.1 Header files and namespaces . 42 3.2 C++ Standard library classes required for the interface . 42 1 3.3 Device selection class . 43 3.4 Platform class . 46 3.4.1 Platform information descriptors . 48 3.5 Context class . 49 3.5.1 Context interface . 49 3.5.2 Context information descriptors . 51 3.6 Device class . 52 3.6.1 Device interface . 52 3.6.2 Device information descriptors . 54 3.7 Queue class . 66 3.7.1 queue interface . 66 3.7.2 Queue information descriptors . 72 3.7.2.1 Queue error handling . 72 4 Data access and storage in SYCL 73 4.1 Host allocation . 73 4.1.1 Default Allocators . 74 4.1.2 Map Allocator . 75 4.2 Buffers . 75 4.2.1 Buffer Interface . 75 4.2.2 Buffer Synchronization Rules . 81 4.3 Images . 83 4.3.1 Image Interface . 83 4.3.2 Image Synchronization Rules . 90 4.3.3 Samplers . 91 4.4 Sharing Host Memory With The SYCL Data Management Classes . 93 4.5 Default behavior . 94 4.5.1 SYCL ownership of the host memory . 94 4.5.2 Shared SYCL ownership of the host memory . 95 4.6 Synchronisation Primitives . 95 4.7 Accessors . 96 4.7.0.1 Access modes . 97 4.7.0.2 Access targets . 97 4.7.0.3 Accessor class . 98 4.7.0.4 Buffer accessors . 102 4.7.0.5 Image accessors . 103 4.7.0.6 Local accessors . 103 4.7.0.7 Host accessors . 104 4.7.0.8 Accessor capabilities and restrictions . 104 4.8 Address space classes . 106 4.8.1 Explicit pointer classes . 106 4.8.1.1 Multi-pointer class . 120 4.9 Pipes . 125 4.9.1 Overview . 125 4.9.2 pipe class . 126 4.9.3 Pipe accessor class . 127 4.9.4 pipe_reservation class . 131 4.9.5 static_pipe class . 133 4.9.6 Pipe exceptions . 135 4.9.7 Example of using pipes . 135 4.9.7.1 Producer-consumer example with pipe . 135 4.9.7.2 Producer-consumer example with pipe reservation . 137.