SN74CBT3126 Datasheet (Rev. K)

SN74CBT3126 Datasheet (Rev. K)

SN74CBT3126 QUADRUPLE FET BUS SWITCH SCDS020K − MAY 1995 − REVISED OCTOBER 2003 D Standard ’126-Type Pinout (D, DB, DGV, D TTL-Compatible Input Levels and PW Packages) D Latch-Up Performance Exceeds 250 mA Per D 5-Ω Switch Connection Between Two Ports JESD 17 D, DB, DGV, OR PW PACKAGE RGY PACKAGE DBQ PACKAGE (TOP VIEW) (TOP VIEW) (TOP VIEW) 1OE 1 14 VCC CC NC 1 16 VCC V 1OE 1A 2 13 4OE 1OE 2 15 4OE 114 1B 3 12 4A 1A 3 14 4A 1A 2 13 4OE 2OE 4 11 4B 1B 4 13 4B 1B 3 12 4A 2A 5 10 3OE 2OE 5 12 3OE 2OE 4 11 4B 2B 6 9 3A 2A 6 11 3A 2A 5 10 3OE GND 7 8 3B 2B 7 10 3B 2B 6 9 3A GND 8 9 NC 78 3B NC − No internal connection GND description/ordering information The SN74CBT3126 quadruple FET bus switch features independent line switches. Each switch is disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. ORDERING INFORMATION ORDERABLE TOP-SIDE T PACKAGE† A PART NUMBER MARKING QFN − RGY Tape and reel SN74CBT3126RGYR CU126 Tube SN74CBT3126D SOIC − D CBT3126 Tape and reel SN74CBT3126DR SSOP − DB Tape and reel SN74CBT3126DBR CU126 −4040°Cto85C to 85°C SSOP (QSOP) − DBQ Tape and reel SN74CBT3126DBQR CU126 Tube SN74CBT3126PW TSSOP − PW CU126 Tape and reel SN74CBT3126PWR TVSOP − DGV Tape and reel SN74CBT3126DGVR CU126 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each bus switch) INPUT FUNCTION OE L Disconnect H A = B Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2003, Texas Instruments Incorporated Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74CBT3126 QUADRUPLE FET BUS SWITCH SCDS020K − MAY 1995 − REVISED OCTOBER 2003 logic diagram (positive logic) 2 3 1A 1B 1 1OE 5 6 2A 2B 4 2OE 9 8 3A 3B 10 3OE 12 11 4A 4B 13 4OE Pin numbers shown are for the D, DB, DGV, PW, and RGY packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . −0.5 V to 7 V Input voltage range, VI (see Note 1) . −0.5 V to 7 V Continuous channel current . 128 mA Input clamp current, IK (VI/O < 0) . −50 mA Package thermal impedance, θJA (see Note 2): D package . 86°C/W (see Note 2): DB package . 96°C/W (see Note 2): DBQ package . 90°C/W (see Note 2): DGV package . 127°C/W (see Note 2): PW package . 113°C/W (see Note 3): RGY package . 47°C/W Storage temperature range, Tstg . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 3. The package thermal impedance is calculated in accordance with JESD 51-5. recommended operating conditions (see Note 4) MIN MAX UNIT VCC Supply voltage 4 5.5 V VIH High-level control input voltage 2 V VIL Low-level control input voltage 0.8 V TA Operating free-air temperature −40 85 °C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN74CBT3126 QUADRUPLE FET BUS SWITCH SCDS020K − MAY 1995 − REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK VCC = 4.5 V, II = −18 mA −1.2 V II VCC = 5.5 V, VI = 5.5 V or GND ±1 μA ICC VCC = 5.5 V, IO = 0, VI = VCC or GND 3 μA ‡ ΔICC Control inputs VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND 2.5 mA Ci Control inputs VI = 3 V or 0 3 pF Cio(OFF) VO = 3 V or 0, OE = GND 4 pF VCC = 4 V, TYP at VCC = 4 V, VI = 2.4 V, II = 15 mA 16 22 II = 64 mA 5 7 § Ω ron VI = 0 VCC = 4.5 V II = 30 mA 5 7 VI = 2.4 V, II = 15 mA 10 15 † All typical values are at VCC = 5 V (unless otherwise noted), TA = 25°C. ‡ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND. § Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals. switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) VCC = 5 V FROM TO VCC = 4 V ± PARAMETER 0.5 V UNIT (INPUT) (OUTPUT) MIN MAX MIN MAX ¶ tpd A or B B or A 0.35 0.25 ns ten OE A or B 5.4 1.6 5.1 ns tdis OE A or B 5 1 4.5 ns ¶ The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance). POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74CBT3126 QUADRUPLE FET BUS SWITCH SCDS020K − MAY 1995 − REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION 7 V TEST S1 500 Ω S1 Open From Output tpd Open Under Test GND tPLZ/tPZL 7 V C = 50 pF tPHZ/tPZH Open L Ω (see Note A) 500 3 V Output 1.5 V 1.5 V LOAD CIRCUIT Control 0 V tPZL tPLZ Output 3.5 V 3 V Waveform 1 1.5 V Input 1.5 V 1.5 V S1 at 7 V VOL + 0.3 V 0 V (see Note B) VOL tPZH tPHZ tPLH tPHL Output VOH VOH Waveform 2 V − 0.3 V 1.5 V OH Output 1.5 V 1.5 V S1 at Open VOL (see Note B) 0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 13-Aug-2021 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples (1) Drawing Qty (2) Ball material (3) (4/5) (6) SN74CBT3126D ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CBT3126 SN74CBT3126DBQR ACTIVE SSOP DBQ 16 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CU126 SN74CBT3126DBQRG4 ACTIVE SSOP DBQ 16 2500 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CU126 SN74CBT3126DBR ACTIVE SSOP DB 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CU126 SN74CBT3126DR ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CBT3126 SN74CBT3126DRG4 ACTIVE SOIC D 14 2500 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CBT3126 SN74CBT3126PW ACTIVE TSSOP PW 14 90 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CU126 SN74CBT3126PWR ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CU126 SN74CBT3126PWRG4 ACTIVE TSSOP PW 14 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -40 to 85 CU126 SN74CBT3126RGYR ACTIVE VQFN RGY 14 3000 RoHS & Green NIPDAU Level-2-260C-1 YEAR -40 to 85 CU126 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

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