Freescale Semiconductor, Inc... Digital Subscriber Line Access Multiplexer Line Card F o Application Note r M o r G e o I HCLDSLAM-AN/D n t f o Version 1.2 Preliminary o : r w m w a t w i o . f n r e O e n s c T a h l i e s . c P o r o m d u c t , Freescale Semiconductor, Inc. DSLAM Application Note Table of Contents 1 Modification History .................................................................................................................3 2Overview..................................................................................................................................3 3 Definitions, Acronyms and Abbreviations................................................................................6 4 Related Documents .................................................................................................................7 5 Application Mapping ................................................................................................................8 6 Assumptions ............................................................................................................................9 7 Network processor architecture.............................................................................................10 7.1 Data Paths ............................................................................................................................10 8 Network processor components ............................................................................................13 8.1 XP .........................................................................................................................................13 8.2 OAM Processing...................................................................................................................14 . 8.3 Statistics Management .........................................................................................................15 . 8.4 DSL Rx-Tx (CP0-CP3)..........................................................................................................17 c 8.5 OC-3c ATM/FR CP (CP4-CP7) ............................................................................................27 n 8.6 IPv4 (CP12 & CP14).............................................................................................................32 I 8.7 Segmentation (CP8 & CP10)................................................................................................38 , 8.8 Reassembly (CP9 & CP11) ..................................................................................................42 r 8.9 FR processing – switching (CP13 & CP15)..........................................................................48 o t 8.10 Fabric Port ..........................................................................................................................51 c 8.11 Table Lookup Unit...............................................................................................................53 u 8.12 Buffer Management Unit.....................................................................................................57 8.13 Queue Management Unit ...................................................................................................57 d 8.14 Q-3 configurations for CPs, XP and FP..............................................................................58 n 9 HOST PROCESSOR ARCHITECTURE ...............................................................................60 o 10 HOST PACKET I/O................................................................................................................61 c i 10.1 Resources...........................................................................................................................61 10.2 Packet Reception................................................................................................................61 m 10.3 Packet Transmission ..........................................................................................................62 e 11 CONSOLE COMMAND SHELL COMMANDS ......................................................................62 S 11.1 Application Control..............................................................................................................62 e 11.2 Table Maintenance and Display .........................................................................................62 l 11.3 DSL Link Configuration and Status ....................................................................................63 a 11.4 OC-3c interface Configuration and Status..........................................................................63 c 11.5 ATM Configuration and Status ...........................................................................................63 s 11.6 FR Configuration and Status ..............................................................................................64 e 11.7 Statistics .............................................................................................................................64 e 12 HOST PROCESSOR TO NETWORK PROCESSOR INTERFACE .....................................64 r 12.1 FR .......................................................................................................................................65 F 13 HOST API REFERENCE.......................................................................................................65 13.1 Table API ............................................................................................................................65 13.2 Link and Channel API.........................................................................................................75 13.3 ATM API .............................................................................................................................75 13.4 FR API ................................................................................................................................77 13.5 Control API .........................................................................................................................78 13.6 I/O API ................................................................................................................................80 14 Appendix – Optimizations done in the application................................................................81 Page 2 / 81 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. DSLAM Application Note 1 Modification History Rev Date Author Department Changes 1.0 24-Feb-03 HCL Technologies Networking Initial version. 1.1 12-Mar-03 J.Bednarek Freescale/C-Port First Comments. 1.2 13-Mar-03 HCL Technologies Networking Incorporated review comments from Freescale 2Overview This document aims at discussing the design of a Digital Subscriber Line Access . Multiplexer (DSLAM) line card. The intended audiences of this document are the . software designers, testers and programmers of the line card based on the C-Port c network processor family. n I , The reader of this document is expected to have a fair understanding of the C-3e NP r architecture and the associated co-processor such as Q-3 (Traffic Management Co- o processor) with the basic understanding of M-2 Utopia/POS-PHY Adapter Reference t Design used in the design of the DSLAM line card. c u d Feature Overview and Standards Support n o This application supports the following features: c • A maximum of 192 ports of ADSL ports i • Support for upto 9 Mbps downstream traffic and 1 Mbps upstream traffic per DSL m port/channel. e • OC-3c interfaces running ATM / FR over SONET S • FR header processing and reassembly • e AAL5 segmentation and reassembly l • ATM Cell switching a • FR switching c • s IPv4 Unicast Routing on all interfaces (ATM/FR) • e Support for ATM traffic management e r DSLAM line card is intended to work in a stack of cards connected on the switching F fabric for communication with the other DSLAM cards as well as the line cards that terminate ATMs. The host module manages and maintains the statistics for the entire system. The communication of the host with the line cards is through the PCI interface. Figure 1 helps in understanding this configuration of the DSLAM line card. Figure 2 and Figure 3 show two configurations of DSLAM application for which the design has been implemented. Page 3 / 81 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. DSLAM Application Note DSLAM Line card ••• 192 ADSL ••• Interfaces . ATM / FR c Line Card ATM / FR ••• n Interfaces I , r o Switching t Fabric PCI bus c Host Processor u card d n o c i Figure 1: Stackable DSLAM line cards within a system m e S e l a c s e e r F Page 4 / 81 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. DSLAM Application Note Configuration I (Figure 2) comprises of eight 24 port xDSL chipset supporting 192 ADSL ports in total. This configuration implements a switch fabric interface. The chunks received on DSL interfaces are sent across the fabric interface via FP. PCI Switching Fabric Q-3 Traffic Management 192 ADSL Ports co-processor 24 DSL M2 Quad ••• QMU 24 DSL Cluster- 0 ••• . ••• . TLU 24 DSL . ••• c BMU Cluster- 3 24 DSL n I 24 DSL , FP Cluster- 2 M2 r Host Quad ••• o 24 DSL processor t XP Cluster- 1 ••• Card c ••• 24 DSL u ••• d C-3e 24 DSL n o c i Figure 2: Configuration- I DSLAM line card with 192 ADSL ports m e S Configuration II (figure 3) is comprised of 96 DSL ports. This