Curriculum Vitae Morris Chang Personal Data Revised: 12/01/2002 Work Address: Home Address: Dept. of Electrical & Computer Eng. 3219 Valley View Rd. 3216 Coover Hall Ames, AI. 50014 Ames, IA 50011-3060 phone: 515-294-7618 phone:515-292-2640 [email protected] Areas of Interest High-performance Java systems, computer architecture, performance analysis of object- oriented systems, hardware support for dynamic memory management, wireless networks, internet architecture, hardware description languages, VLSI system, reconfigurable computing, and network processors. Education Ph.D., Computer Engineering, North Carolina State University, December 1993 Minor: Computer Science Dissertation Title: A coprocessor architecture for memory management in object-oriented systems. Advisor: Prof. Edward F. Gehringer MSEE, North Carolina State University, May 1986 Major: Electrical Engineering. Minor: Mathematics. BSEE, Tatung Institute of Technology, Taiwan, June 1983 Professional Experience 8/01 — Associate Professor, Dept. of Electrical and Computer Engineering, Iowa State University, Ames, IA. 8/95-5/01 Assistant Professor, Computer Engineering Program and Dept. of Computer Science, Illinois Institute of Technology, Chicago, IL. 9/93–8/95 Visiting Assistant Professor, Dept. Electrical Engineering, Rochester Institute of Technology, Rochester, NY. 8/88–8/90 Member of Technical Staff, Department of Exploratory Microsystems, AT&T Bell Laboratories, Allentown, PA (with the Hobbit, AT&T’s low-power 32-bit RISC chip, design team). 5/86–2/88 Member of Technical Staff, Microelectronic Center of North Carolina, Research Triangle Park, NC 1 5/83–8/84 Analog IC Design Engineer, Texas Instruments, Dallas, Texas. Consulting 8/1997 - present Toko America, Inc., Mt. Prospect, IL. Supervised four engineers to develop Network Interface Card (NIC) for 100 Base T2 standard and Wireless Local Area Network products based on IEEE 802.11 standard. Awards May, 1999 University Excellence in Teaching Award (only one award is given each year from the University) , Illinois Institute of Technology April 18, 1997 Overall Excellence Award, among 36 projects presented, in the 2nd Annual Under Graduate Research Conference, Illinois Institute of Technology. Grants and Contracts 1. Morris Chang (PI), “ITR: A Low-power High-efficiency Garbage Collector for Embedded Java Systems”, NSF, $250,994 (Grant # CCR-0219870), Sep. 2002- Aug. 2005, Funded. 2. Morris Chang (PI), “Research Experience for Teacher (RET) Supplement for ITR project”, NSF, $10,000 (Grant # CCR 0296131), August 2002- August 2004, Funded. 3. Morris Chang (PI), “Research Experience for Undergraduates (REU) Supplement for ITR project”, NSF, $6,000 (Grant # CCR 0296131), May 2002- August 2004, Funded. 4. Morris Chang (PI), “ITR/SY: A High-performance Memory Manager for Multithreaded Applications”, NSF, $289,862 (Grant # CCR-0113335), September 2001- August 2004, Funded. 5. Morris Chang (PI), “Concurrent Garbage Collection for Multithreaded-multiprocessor Environments”, NSF, $127,054 (Grant # CCR-0098235), July 2001 - July 2004. Funded. 6. Morris Chang (PI), Travel grant from the International Symposium on High Performance Computing-ISHPC (Tokyo, Japan) to present the paper “Java Bytecode Optimization with Advanced Instruction Folding Mechanism”, October 16, 2000 7. Morris Chang (PI), NSF Travel Award, $1,500, to attend the 1998 International Conference on Engineering Education, Rio de Janeiro, Brazil, July, 1998 8. Morris Chang (PI), Chinese Petroleum Corporation, “Integration of Information System and Management Strategy for a Global Enterprise”, $5,500. March 24, 1997. Funded. 9. Morris Chang (PI), DARPA Grant, “Hardware-assisted Memory Management”, $200,000. April, 1997, Awarded, not funded. 2 10. Morris Chang (PI), IIT ERIF Grant, “Architectural Support for Object-Oriented Systems”, $10,000.00, 9/1996 - 5/31/1997. Funded. 11. Morris Chang (PI), John Nestor (Co-PI) and Adre Takach (Co-PI), “A Laboratory for Integrating Digital Design and Test”, NSF (ILI), 7/96-6/ 99, $120,471 (grant # DUE-9650347). Funded. 12. Morris Chang (PI), “Computer Engineering Laboratory”, Illinois State Grant for Undergraduate Laboratory Equipment, 3/11/96, $15,000. Funded 13. Morris Chang (PI), “Design of Microprocessor using VHDL and CPLD”, Altera Equipment Grant (Altera University Program) 12/18/95 - 12/18/98, $173,330. Funded 14. Morris Chang (PI), IIT ERIF Grant, “Hardware-assisted Memory Management”, $10,000.00, 11/1995 - 5/31/1996. Funded Proposals Submitted within Last Year 1. Morris Chang (PI), “Distributed Object: Performance Study, Strategies and Impelementation”, Submitted to NSF on Nov. 1, 2002. $301,660 requested 2. Arun Somani (PI), Co-PIs: Akhilesh Tyagi, Morris Chang, Soma Chaudhuri, “MAILS: Multidimensional QoS-Aware Inward-Looking Middleware System”, submitted to DARPA on Oct. 30, 2002. ($1,254,824 requested) 3. Morris Chang (PI), “Architectural Support for Dynamic Memory Management ” Submitted to NSF on Dec. 4, 2002. $263,956 requested. 4. Morris Chang (PI), and Daniel Berleant (Co-PI), “ITR: Integrating Performance Research into a New Undergraduate Software Engineering Curriculum”, Submitted to NSF on Dec 12, 2002. $462,322 requested. Refereed Journal Publications (note: * student) 1. Woo H. Lee* and J. M. Chang, " A Study of Dynamic Memory Management in C++ Programs", accepted for publication in International Journal of Computer Languages , Elsevier Science, 2003 2. W. Srisa-an*, C. D. Lo and J. M. Chang, “Hardware Support for Garbage Collection in Embedded Systems Using the Active Memory Module”, accepted for publication in International Journal of Microprocessors and Microsystems, Elsevier Science, 2003 3. C. D. Lo*, W. Srisa-an, and J. M. Chang, "A Quantitative Simulator for Dynamic Memory Managers" , accepted for publication in The Journal of Systems and Software, Elsevier Science, 2003 4. Woo H. Lee* and J. M. Chang, “An Integrated Dynamic Memory Tracing Tool for C++ 3 Programs” , accepted for publication in International Journal of Information Sciences, Elsevier Science, 2003. 5. Therapon Skotiniotis* and J. M. Chang, “Estimating Internal Memory Fragmentation for Java Virtual Machines with the Segregated Lists Policy” , accepted for publication in The Journal of Systems and Software, Elsevier Science, 2002. 6. W. Srisa-an*, C. D. Lo and J. M. Chang, “Scalabale Hardware-Algorithms for Object Resizing and Reclamation”, International Journal of Microprocessors and Microsystems , Elsevier Science, Volume 25, 2002, pp. 459-467. 7. J. M. Chang, W. Srisa-an, C.D. Lo, and E. F. Gehringer, “DMMX: Dynamic Memory Management Extensions”, The Journal of Systems and Software , Volume 63, Issue 3, Elsevier Science, 2002. pp. 187-199. 8. G. Koutsogiannakis*, and J. M. Chang, “Java Distributed Object Models: An Alternative to Corba?” , IEEE IT Professional, Volume 4, Number 3, June 2002, pp. 41-47 9. W. Srisa-an*, C. D. Lo and J. M. Chang, " Putting Voice into Wireless Communications", IEEE IT Professional, Volume 4, Number 1, Feb. 2002, pp. 70-72. 10. C. D. Lo*, W. Srisa-an and J. M. Chang, "Performance Analysis on the Generalized Buddy System", IEE Proceedings: Computers and Digital Techniques, Volume 148, Issue 04, September 2001. pp. 167-175 11. J. M. Chang and Kagan S. Agun, "On Design-For-Reusability in VHDL ", IEE Computing & Control Engineering Journal , volume 12, number 5, Oct. 2001. pp. 231-239 12. C. D. Lo*, W. Srisa-an and J. M. Chang, "A Study of Page Replacement Performance in Garbage Collection Heap", The Journal of Systems and Software , Volume 58, Elsevier Science, 2001. pp.235-245. 13. J. M. Chang, W. H. Lee and W. Srisa-an, "A Study of the Allocation Behavior of C++ Programs", The Journal of Systems and Software. Volume 57, Elsevier Science, 2001. pp. 107-118. 14. J. M. Chang and C. H. Daugherty, "An Efficient Data Structure for Dynamic Memory Management", The Journal of Systems and Software, volume 54, Elsevier Science, 2000. pp. 219-226. 15. A. Kim* and J. M. Chang, "Designing a Java Microprocessor Core using FPGA Technology", IEE Computing & Control Engineering Journal , vol. 11-num. 3. June 2000. pp. 135-141. 16. W. Srisa-an*, C. D. Lo and J. M. Chang, "A Hardware Implementation of Realloc function", Integration, the VLSI Journal , Volume 28, Elsevier Science, 1999. pp. 173-184 17. J. M. Chang, "An Optimized Two-Dimensional Buddy System for Dynamic Resource 4 Allocation," Journal of High Performance Computing, Vol. 4, No. 1, Dec. 1997. pp. 47-55 18. J. M. Chang and E. F. Gehringer, "A High-Performance Memory Allocator for Object- Oriented Systems," IEEE Transactions on Computers. March, 1996. pp. 357-366 19. J. M. Chang and E. F. Gehringer, "Performance of Object Caching for Object-Oriented Systems", IFIP Transactions A: Computer Science and Technology A-42, International Federation for Information Processing, Sept, 1993, pp. 83-91. Refereed Conference Publications 1. H. Wang*, J. Miao, and J. M. Chang, “An Enhanced Link Layer Retransmission Scheme for IEEE 802.11”, to appear in the Proceedings of IEEE Wireless Communications and Networking Conference, (WCNC 2003), New Orleans, Louisiana, March 16-20, 2003, 2. W. Srisa-an*, C. D. Lo, and J. M. Chang, “Performance Enhancements to the Active Memory System”, Proceedings of IEEE International Conference on Computer Design, (ICCD 2002), Freiburg, Germany, September 16-18, 2002. pp. 249-256. 3. C. D. Lo*, W. Srisa-an, and J. M. Chang, “A Multithreaded Concurrent Garbage Collector Parallelizing the New Instruction in Java”, Proceedings of 16th IEEE International