Freescale Semiconductor, Inc... SILICON REVISION A1 REVISION SILICON C-5e NETWORK PROCESSOR Sheet Data Rev 03 PRELIMINARY C5ENPA1-DS/D Freescale Semiconductor,Inc. F o r M o r G e o I n t f o o : r w m w a t w i o . f n r e O e n s c T a h l i e s . c P o r o m d u c t , Freescale Semiconductor, Inc... Freescale Semiconductor,Inc. F o r M o r G e o I n t f o o : r w m w a t w i o . f n r e O e n s c T a h l i e s . c P o r o m d u c t , Freescale Semiconductor, Inc... Freescale Semiconductor,Inc. Silicon RevisionA1 C-5e NetworkProcessor Data Sheet Rev 03 C5ENPA1-DS/D F o r M o r Preli G e o I n t f o o : r w m w a t w i o . f n r e O e n s c T a h l i e s . c P o r o m m d u c t , inary Freescale Semiconductor, Inc... Freescale Semiconductor,Inc. F o r M o r G e o I n t f o o : r w m w a t w i o . f n r e O e n s c T a h l i e s . c P o r o m d u c t , Freescale Semiconductor, Inc. C5ENPA1-DS/D Rev 03 CONTENTS . About This Guide . Guide Overview . 13 c Data Sheet Classifications . 14 n Using PDF Documents . 14 I , Guide Conventions . 16 r Revision History . 16 o Related Product Documentation . 17 t c CHAPTER 1 Functional Description u Features . 19 d 19 Massive Processing Power . n o High Functional Integration . 19 c Block Diagram . 20 i Channel Processors . 22 m Executive Processor . 23 e System Interfaces . 23 S Fabric Processor . 24 e Buffer Management Unit . 24 l Table Lookup Unit . 25 a Queue Management Unit . 26 c s CHAPTER 2 Signal Descriptions e Signal Summary . 27 e r Pinout Diagram . 28 F Pin Descriptions Grouped by Function . 30 LVTTL and LVPECL Specifications . 30 Clock Signals . 31 CP Interface Signals . 32 DS1/T1 Framer Interface Configuration . 34 10/100 Ethernet (RMII) Configuration . 34 Gigabit Ethernet (GMII) Configuration . 35 03 For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. 6 CONTENTS Gigabit Ethernet and Fibre Channel TBI Configuration . 38 SONET OC-3 Transceiver Interface Configuration . 39 SONET OC-12 Transceiver Interface Configuration . 40 Executive Processor System Interface Signals . 42 PCI Signals . 42 Serial Interface Signals . 43 PROM Interface Signals . 44 . General System Interface Signal . 47 . Fabric Processor Interface Signals . 48 c BMU SDRAM Interface Signals . 52 n I TLU SRAM Interface Signals . 54 , QMU SRAM (Internal Mode) Interface Signals . 55 r QMU to Q-5 TMC (External Mode) Interface Signals . 56 o t Power Supply Signals . 57 c Test Signals . 58 u No Connection Pins . 58 d Signals Grouped by Pin Number . 59 n JTAG Support . 69 o Pinout . 69 c i JTAG Data Registers . 69 Boundary Scan Restriction . 69 m e Boundary Scan Cell Types . 69 S IDcode Register . 71 JTAG Instruction Register . 71 e l Boundary Scan Description Language . 72 a c CHAPTER 3 Electrical Specifications s Absolute Maximum Ratings . 73 e Recommended Operating Conditions . 74 e DC Characteristics . 75 r Power Sequencing . ..