Retargeting a C Compiler for a DSP Processor Master thesis performed in electronics systems by Henrik Antelius LiTH-ISY-EX-3595-2004 Linköping 2004 Retargeting a C Compiler for a DSP Processor Master thesis in electronics systems at Linköping Institute of Technology by Henrik Antelius LiTH-ISY-EX-3595-2004 Supervisors: Thomas Johansson Ulrik Lindblad Patrik Thalin Examiner: Kent Palmkvist Linköping, 2004-10-05 Avdelning, Institution Datum Division, Department Date 2004-10-05 Institutionen för systemteknik 581 83 LINKÖPING Språk Rapporttyp ISBN Language Report category Svenska/Swedish Licentiatavhandling ISRN LITH-ISY-EX-3595-2004 X Engelska/English X Examensarbete C-uppsats Serietitel och serienummer ISSN D-uppsats Title of series, numbering Övrig rapport ____ URL för elektronisk version http://www.ep.liu.se/exjobb/isy/2004/3595/ Titel Anpassning av en C-kompilator för kodgenerering till en DSP-processor Title Retargeting a C Compiler for a DSP Processor Författare Henrik Antelius Author Sammanfattning Abstract The purpose of this thesis is to retarget a C compiler for a DSP processor. Developing a new compiler from scratch is a major task. Instead, modifying an existing compiler so that it generates code for another target is a common way to develop compilers for new processors. This is called retargeting. This thesis describes how this was done with the LCC C compiler for the Motorola DSP56002 processor. Nyckelord Keyword retarget, compiler, LCC, DSP Abstract The purpose of this thesis is to retarget a C compiler for a DSP proces- sor. Developing a new compiler from scratch is a major task. Instead, modifying an existing compiler so that it generates code for another target is a common way to develop compilers for new processors. This is called retargeting. This thesis describes how this was done with the LCC C compiler for the Motorola DSP56002 processor. Table of contents 1 Introduction 1 1.1 Background . 1 1.2 Purpose and goal. 1 1.3 The reader. 2 1.4 Reading guidelines . 2 2 DSP 3 2.1 Introduction . 3 2.2 Motorola DSP56002. 4 2.2.1 Data buses . 5 2.2.2 Address buses. 5 2.2.3 Data ALU . 5 2.2.4 Address generation unit . 5 2.2.5 Program control unit . 6 2.3 Instruction set . 6 2.4 Assembly . 6 3 Compilers 9 3.1 Introduction . 9 3.2 The analysis-synthesis model . 9 3.3 Phases . 10 3.4 Analysis . 11 3.4.1 Lexical analysis. 11 3.4.2 Syntax analysis . 11 3.4.3 Semantic analysis . 14 3.5 Synthesis. 15 3.5.1 Intermediate code generation . 15 3.5.2 Code optimization . 16 3.5.3 Code generation . 18 3.6 Symbol table. 18 3.7 Error handler . 19 3.8 Front and back end . 19 3.9 Environment . 20 ix 3.9.1 Preprocessor . 20 3.9.2 Assembler . 20 3.9.3 Linker and loader. 21 3.10 Compiler tools . 21 4 LCC 23 4.1 Introduction . 23 4.2 C. 24 4.3 The compiler . 24 4.3.1 Lexical analysis. 24 4.3.2 Syntax analysis . 26 4.3.3 Semantic analysis . 29 4.3.4 Intermediate code generation . 29 4.3.5 Back end . 30 5 Implementation 33 5.1 Introduction . 33 5.2 The compiler . 33 5.2.1 Data types and sizes . 34 5.2.2 Register usage. 35 5.2.3 Memory usage . 36 5.2.4 Frame layout. 37 5.2.5 Calling convention. 38 5.2.6 Naming convention . 39 5.3 Retargeting . 39 5.3.1 Configuration . 40 5.3.2 Declarations . 40 5.3.3 Rules. 40 5.3.4 C code . 40 5.4 Special features . 44 5.5 Other changes to LCC. 45 5.6 The environment . 45 5.7 crt0 . 46 5.8 Problems. 46 5.8.1 Register targeting. 46 5.8.2 48-bit registers . 48 5.8.3 Address registers . 48 5.9 Improvements . 49 6 Conclusions 51 6.1 Retargeting . 51 6.2 Future work . 51 References 53 x Table of contents Appendix A: Instructions 55 A.1 Arithmetic instructions . 55 A.2 Logical instructions . 56 A.3 Bit manipulation instructions . 57 A.4 Loop instructions . 57 A.5 Move instructions . 57 A.6 Program control instructions . 58 Appendix B: Sample code 59 B.1 sample.c . 59 B.2 sample.asm . 60 Appendix C: dsp56k.md 61 Index 79 xi xii 1 Introduction 1.1 Background The division of Electronics Systems (ES) at the department of Electri- cal Engineering (ISY) at Linköping University (LiU) is currently run- ning a project aiming at developing a DSP processor. The goal of this project is to make a DSP with a scalable structure that is instruction level compatible with the Motorola DSP56002 processor. The scalabil- ity refers to variable data word length and addition or removal of memories and instructions. The goal with scalability is to reduce the power consumption. Currently this project is nearly finished. In order to increase the usabil- ity of the DSP a C compiler is needed. It was decided that the best way to create a C compiler was to retarget an existing C compiler. Creating a compiler from scratch is a big undertaking that requires a lot of work. Retargeting a compiler is a rel- atively easy task compared to developing an entire compiler. 1.2 Purpose and goal The purpose of this thesis is to retarget a C compiler to the Motorola DSP56002 processor. The resulting compiler should from one or more C source files produce an executable file that can execute on the DSP. The only requirement on the compiler is that it should generate code 1 1.3 – The reader that works correctly and functions as intended. There are no require- ments on the performance or the size of the generated code. The compiler should also be compatible with Motorola’s C compiler and tools for the DSP56002. This makes it possible to mix generated code from the two compilers. It also means that the tools from Motorola can be used for the new compiler. 1.3 The reader It is assumed that the reader of this thesis has basic knowledge of the C programming language and some knowledge of assembly lan- guage. It is also assumed that the reader has a general knowledge of how processors work and what function a compiler has. 1.4 Reading guidelines This is a brief description of the chapters: • Chapter 1 contains an introduction and states the purpose of the thesis. • Chapter 2 describes how the DSP56002 processor works and how it can be used. • Chapter 3 contains general compiler theory that is needed to understand how a compiler works. • Chapter 4 describes the compiler LCC that was used in this thesis. • Chapter 5 describes the implementation and modifications that were done to LCC. • Chapter 6 lists the conclusions that were made and suggests fur- ther work. 2 2 DSP This chapter contains a description of how the Motorola DSP56002 processor works. This information is collected from [4]. 2.1 Introduction Digital signal processing is, as the term suggests, the processing of sig- nals by digital means. The signal is normally an electrical signal car- ried on a wire, but it can represent almost any kind of information and it can be processed in a wide variety of ways. Examples of digital sig- nal processing include the following: • Filtering of signals. • Convolution, which is the mixing of two signals. • Correlation, which is the comparison of two signals. • Rectification, amplification and transformation of a signal. All of these tasks have earlier been performed by using analog cir- cuits. Nowadays integrated circuits have enough processing power to perform these and many other functions. The devices performing these tasks are called.