Integrated Interface Circuits For Switched Capacitor Sensors by Kenneth W. Peter Thesis submitted for the degree of Doctor of Philosophy Faculty of Science University of Edinburgh April 1991 Abstract This thesis reports an investigation into integrated interface circuits for switched capacitor sensors for application in industrial process control instrumentation networks. Three circuits are presented: an absolute capacitance to voltage converter; a capa- citance ratio to frequency ratio converter; and a capacitance ratio to voltage ratio con- verter. Of the circuits, the first two are subject to most thorough investigation with the capacitance ratio to frequency ratio converter being of particular interest. This circuit is based upon a switched capacitor, frequency controlled, negative feedback loop which permits implementation with modest quality analogue components, such as are pro- vided with a standard-cell ASIC CMOS process. Initial investigations, accomplished with discrete component implementations of the interface circuits, reveal a significant departure in behaviour from that predicted by first-order analysis. Switch induced charge-feedthrough is shown to be responsible for the deviation. In addition, parasitic induced jitter and frequency locking are identified as a second source of error. The three interface circuits are implemented as an integrated circuit using the European Silicon Structures (ES2) ASIC CMOS process, with a modification to permit the inclusion of full-custom designed, charge-feedthrough compensated switches. This implementation exhibits greatly reduced charge-fcedthrough, and circuit behaviour is in accordance with a modification to the first-order analysis that includes the effects of charge-feedthrough. Importantly, no frequency locking and much reduced jitter is observed. Significantly, linear performance is obtained for the capacitance ratio to fre- quency ratio converter over a 20 to I capacitance range, with operation demonstrable down to 5pF sensor capacitance. Declaration This thesis, composed entirely by myself, reports work carried out solely by myself in the Department of Electrical Engineering, University of Edinburgh between October 1987 and September 1990. Acknowledgements I am grateful to my supervisors, Prof. J.R.Jordan and Dr. D.Renshaw, for their unsparing support and guidance during the course of this work. I would also like to thank the other members of the Instrumentation and Digital Systems Group, namely Mr. S.Lytollis, Dr. I.M.Flanagan and Dr. K.Sylvan. for invaluable conversations and assistance, and acknowledge the able technical support of Mr. R.Stevenson. Mr. A.M.Gundlach of the Edinburgh Microfabrication Facility and Dr. G.M.Blair merit acknowledgement for their assistance with the EMF and ES2 IC designs. Finally, I wish to thank my parents for their unfailing encouragement and support over the years. Kenneth W. Peter April 1991 - 11 - Index of Abbreviations ADC Analogue-to-Digital Converter IS Intrinsic Safety ASIC Application Specific Integrated MSB Most Significant Bit Circuit CAD Computer Aided Design NMOS N-type CMOS Complementary Metal Oxide PMOS P-type Metal Oxide Semiconductor Semiconductor CR0 Cathode Ray Oscilloscope RTD Resistive Temperature Device DAC Digital-to-Analogue Converter SAR Successive Approximation Register ES2 European Silicon Structures SC Switched-Capacitor IC Integrated Circuit VCO Voltage Controlled Oscillator List of Symbols _1) CaD Gate-drain overlap capacitance (Fin U Gate voltage falling-rate (Vs 1 _1) CGS Gate-source overlap capacitance (Fm W Channel width (m) Cox Oxide capacitance (Fm 2) 13 Conductance coefficient (AV 2 ) _1) L Channel length (m) € Permittivity (Fin (JK _1) dm Feedthrough charge (C) k Boltzmann's constant RON MOS on-resistance (1k) p Carrier mobility (m 2V 1s 1 ) T0 Channel transit time (s) q Charge on an electron (C) Vdm Feedthrough voltage (V) NSUB Dopant density (in _3) VG Gate voltage (V) tz1 Intrinsic carrier concentration (in 3 ) y Body effect parameter V11 Gate high voltage (V) (V ') VL Gate low voltage (V) cI Fermi potential (V) VT Threshold voltage (V) VHT = V11 —V —V - 111 - Table of Contents Abstract . Declaration..............................................................ii Acknowledgements .......................................................ii Index of Abbreviations ................................................... Listof Symbols ........................................................... Table of Contents ........................................................iv Chapter 1 Pressure Sensing in Industrial Process Control: An Overview Introduction ..................................................1 Present Process Control Systems ................................1 Recent Developments in Process Control ........................ 5 PressureMeasurement .........................................14 Research Objectives ...........................................17 Achievements .................................................18 Thesis Layout .................................................19 Chapter 2 Capacitance Sensor Interfacing Using Switched-Capacitor Techniques Introduction ..................................................20 General Purpose SC Analogue-to-Digital Converters .............25 Serial or Integrating SC Analogue-to-Digital Converters 28 Binary-Search SC Analogue-to-Digital Converters .............35 SC Interface Circuits ...........................................39 - iv - SC Interface Circuits Based on Serial ADCs .................. 41 SC Interface Circuits Based on Algorithmic Conversion ....... 43 SC Interface Circuits with Frequency or Duty Cycle Output 45 An Analysis of SC Interface Circuits ............................ 52 Charge-Injection and Clock-Feedthrough ........................ 57 A Detailed Examination of Charge-Feedthrough ............. 59 Charge-Feedthrough Cancellation Schemes ................... 64 Chapter Summary ............................................. 68 Chapter 3 ASIC CMOS Sensor Interface Circuits Introduction .................................................. 70 SC Interface Circuits for Capacitance Ratio Sensors .............. 70 A Family of Switched-Capacitor Circuits for Capacitance Sensors 73 The SC Capacitance-to-Voltage Converter ................... 73 The Frequency Control Loop ............................... 76 The Voltage Control Loop .................................. 79 Notable Aspects of Frequency Control Loop Operation ........... 79 Operational Amplifier Imperfections in the Frequency Control Loop......................................................... Noise and Aliasing ............................................ Chapter Summary ............................................. Chapter 4 The Discrete Implementation of the Interface Circuits Introduction .................................................. Steady-State Measurements on Discrete Implementations of the Interface Circuits .............................................. -v - Section Introduction 89 The SC Capacitance-to-Voltage Converter ................... 91 The Frequency Control Loop ............................... 95 Section Summary ........................................... 95 Charge-Feedthrough within the Four Switch Block ............... 99 Section Introduction ........................................ 99 Charge-Feedthrough in the 4016 CMOS Transmission Gate 100 Charge-Feedthrough in a Four Switch Arrangement .......... 107 Derivation of a Charge-Feedthrough Expression .............. 112 Section Summary ........................................... 117 Locking and Jitter ............................................. 118 Section Introduction ........................................ 118 Lock-up of the Feedback Frequency in the Frequency Control Loop...................................................... 118 Locking and Jitter in the Frequency Control Loop ............ 120 Power Consumption and Transient Response .................... 122 Section Introduction ........................................ 122 Power Consumption of the Frequency Control Loop .......... 123 The Settling Time of the Frequency Control Loop ............ 125 Chapter Summary ............................................. 126 Chapter 5 The Integrated Implementation of the Interface Circuits Introduction .................................................. 129 Integrated Circuit Process Options .............................. 131 Integrated Interface Design ..................................... 133 - vi - Full-Custom Switch Design 140 Test of the Prototype ASIC .................................... 148 Chapter Summary ............................................. 160 Chapter 6 Summary and Conclusions Summary..................................................... 163 Conclusions ................................................... 165 Recommendations for Future Work ............................. 170 Bibliography............................................................. 172 Appendix A ES2 Analogue Library Component Data OP-22 the High Drive Operational Amplifier .................. 182 OP-32 the Low Power Operational Amplifier .................. 183 VC01 the Voltage Controlled Oscillator ...................... 184 Appendix B The EMF Test IC ........................................... 185 Microphotograph of EMF Test IC ............................ 186 Appendix C The ES2 Prototype IC Pin-out Details of the Prototype IC ........................... 187 Microphotograph of ES2 Prototype IC ........................ 191 Node Communications