Intel® FPGA SDK for OpenCL™ Pro Edition Programming Guide Updated for Intel® Quartus® Prime Design Suite: 19.1 Subscribe UG-OCL002 | 2019.04.22 Send Feedback Latest document on the web: PDF | HTML Contents Contents 1. Intel® FPGA SDK for OpenCL™ Overview......................................................................... 7 1.1. Intel FPGA SDK for OpenCL Pro Edition Programming Guide Prerequisites......................7 1.2. Intel FPGA SDK for OpenCL FPGA Programming Flow..................................................8 2. Intel FPGA SDK for OpenCL Offline Compiler Kernel Compilation Flows........................ 10 2.1. One-Step Compilation for Simple Kernels................................................................ 11 2.2. Multistep Intel FPGA SDK for OpenCL Pro Edition Design Flow.................................... 12 3. Obtaining General Information on Software, Compiler, and Custom Platform...............16 3.1. Displaying the Software Version (version)............................................................... 16 3.2. Displaying the Compiler Version (-version).............................................................. 17 3.3. Listing the Intel FPGA SDK for OpenCL Utility Command Options (help).......................17 3.3.1. Displaying Information on an Intel FPGA SDK for OpenCL Utility Command Option (help <command_option>)............................................................. 17 3.4. Listing the Intel FPGA SDK for OpenCL Offline Compiler Command Options (no argument, -help, or -h)......................................................................................17 3.5. Listing the Available FPGA Boards and Custom Platforms (-list-boards and -list- board-packages)...............................................................................................18 3.6. Displaying the Compilation Environment of an OpenCL Binary (env)........................... 19 4. Managing an FPGA Board.............................................................................................. 20 4.1. Installing an FPGA Board (install)...........................................................................20 4.2. Uninstalling an FPGA Board (uninstall).................................................................... 22 4.3. Querying the Device Name of Your FPGA Board (diagnose)........................................ 23 4.4. Running a Board Diagnostic Test (diagnose <device_name>).....................................24 4.5. Programming the FPGA Offline or without a Host (program <device_name>)............... 24 4.6. Programming the Flash Memory (flash <device_name>)........................................... 24 5. Structuring Your OpenCL Kernel................................................................................... 26 5.1. Guidelines for Naming the Kernel........................................................................... 26 5.2. Programming Strategies for Optimizing Data Processing Efficiency..............................27 5.2.1. Unrolling a Loop (unroll Pragma) ............................................................28 5.2.2. Coalescing Nested Loops...........................................................................28 5.2.3. Specifying a Loop Initiation interval (II)...................................................... 30 5.2.4. Loop Concurrency (max_concurrency Pragma) .........................................31 5.2.5. Loop Speculation (speculated_iterations Pragma) ............................... 32 5.2.6. Specifying Work-Group Sizes..................................................................... 33 5.2.7. Specifying Number of Compute Units..........................................................34 5.2.8. Specifying Number of SIMD Work-Items......................................................34 5.2.9. Specifying the Memory Attribute................................................................ 35 5.3. Programming Strategies for Optimizing Pointer-to-Local Memory Size......................... 36 5.4. Implementing the Intel FPGA SDK for OpenCL Channels Extension............................. 36 5.4.1. Overview of the Intel FPGA SDK for OpenCL Channels Extension.................... 37 5.4.2. Channel Data Behavior............................................................................. 37 5.4.3. Multiple Work-Item Ordering for Channels................................................... 38 5.4.4. Restrictions in the Implementation of Intel FPGA SDK for OpenCL Channels Extension ................................................................................. 40 5.4.5. Enabling the Intel FPGA SDK for OpenCL Channels for OpenCL Kernel............. 42 Intel FPGA SDK for OpenCL Pro Edition: Programming Guide Send Feedback 2 Contents 5.5. Implementing OpenCL Pipes..................................................................................54 5.5.1. Overview of the OpenCL Pipe Functions.......................................................55 5.5.2. Pipe Data Behavior...................................................................................56 5.5.3. Multiple Work-Item Ordering for Pipes.........................................................56 5.5.4. Restrictions in OpenCL Pipes Implementation...............................................58 5.5.5. Enabling OpenCL Pipes for Kernels............................................................. 59 5.5.6. Direct Communication with Kernels via Host Pipes........................................ 69 5.6. Implementing Arbitrary Precision Integers...............................................................73 5.7. Using Predefined Preprocessor Macros in Conditional Compilation............................... 74 5.8. Declaring __constant Address Space Qualifiers........................................................ 75 5.9. Including Structure Data Types as Arguments in OpenCL Kernels................................76 5.9.1. Matching Data Layouts of Host and Kernel Structure Data Types.....................76 5.9.2. Disabling Insertion of Data Structure Padding ............................................. 78 5.9.3. Specifying the Alignment of a Struct...........................................................78 5.10. Inferring a Register............................................................................................ 79 5.10.1. Inferring a Shift Register......................................................................... 80 5.11. Enabling Double Precision Floating-Point Operations................................................81 5.12. Single-Cycle Floating-Point Accumulator for Single Work-Item Kernels.......................81 5.12.1. Programming Strategies for Inferring the Accumulator................................ 82 5.13. Integer Promotion Rules......................................................................................83 6. Designing Your Host Application................................................................................... 85 6.1. Host Programming Requirements........................................................................... 85 6.1.1. Host Machine Memory Requirements.......................................................... 85 6.1.2. Host Binary Requirement.......................................................................... 85 6.1.3. Multiple Host Threads............................................................................... 86 6.1.4. Out-of-Order Command Queues.................................................................86 6.1.5. Requirement for Multiple Command Queues to Execute Kernels Concurrently... 86 6.2. Allocating OpenCL Buffers for Manual Partitioning of Global Memory........................... 86 6.2.1. Partitioning Buffers Across Multiple Interfaces of the Same Memory Type.........86 6.2.2. Partitioning Buffers Across Different Memory Types (Heterogeneous Memory).. 88 6.2.3. Creating a Pipe Object in Your Host Application............................................ 89 6.3. Collecting Profile Data During Kernel Execution........................................................ 90 6.3.1. Profiling Enqueued and Autorun Kernels ..................................................... 92 6.3.2. Profile Data Acquisition............................................................................. 93 6.3.3. Multiple Autorun Profiling Calls...................................................................93 6.4. Accessing Custom Platform-Specific Functions......................................................... 94 6.5. Modifying Host Program for Structure Parameter Conversion......................................95 6.6. Managing Host Application.................................................................................... 96 6.6.1. Displaying Example Makefile Fragments (example-makefile or makefile)..........96 6.6.2. Compiling and Linking Your Host Application................................................ 97 6.6.3. Using OpenCL ICD Extension APIs............................................................ 101 6.6.4. Programming an FPGA via the Host.......................................................... 101 6.6.5. Termination of the Runtime Environment and Error Recovery....................... 106 6.7. Allocating Shared Memory for OpenCL Kernels Targeting SoCs..................................106 6.8. Debugging Your OpenCL System That is Gradually Slowing Down............................. 108 7. Compiling Your OpenCL Kernel....................................................................................109 7.1. Compiling