3-Channel ED Filter Video Amplifier with 4-V/V Gain Datasheet

3-Channel ED Filter Video Amplifier with 4-V/V Gain Datasheet

THS7320 www.ti.com SBOS565B –JULY 2011–REVISED SEPTEMBER 2012 3-Channel ED Filter Video Amplifier with 4-V/V Gain Check for Samples: THS7320 1FEATURES DESCRIPTION Fabricated using the revolutionary, complementary 2• Very Low Total Quiescent Current: 3.5 mA at 3 V Silicon-Germanium (SiGe) BiCom-3X process, the THS7320 is a very low power, single-supply, 2.6-V to • Disabled Supply Current: 0.15 µA 5-V, three-channel integrated video buffer with a gain • Third-Order Butterworth Low-Pass Filters: of 4 V/V. This device is ideal for battery-powered – –1 dB at 17 MHz applications where size and power are critical parameters. The total quiescent current is only 3.5 – –3 dB at 20 MHz mA at 3 V and the video portion can be reduced – Attenuation: 21 dB at 43 MHz down to 0.15 µA while disabled. – Supports Y’P’BP’R 480p/576p or The THS7320 video section incorporates three R’G’B’ Video enhanced definition (ED) filter channels with third- – Supports Oversampled Systems order Butterworth characteristics. These filters are Generating CVBS, S-Video, or useful as digital-to-analog converter (DAC) reconstruction filters or as analog-to-digital converter Y’P’BP’R 480i/576i (ADC) antialiasing filters. The THS7320 is also ideal • DC-Coupled Input with 150-mV Output Shift for oversampled systems that produce standard • Built-In Gain: 4 V/V (12 dB) definition (SD) signals including CVBS, S-Video, • Single-Supply Operation: +2.6 V to +5 V 480i/576iY’P’BP’R, Y’U’V’, and R’G’B’. • Rail-to-Rail Output Supports The THS7320 is designed for dc-coupled inputs. To AC- or DC-Coupling mitigate any DAC/encoder termination interaction, the • Low Differential Gain/Phase: 0.1%/0.1° input impedance is a very high 2.4 MΩ. The internal level shift adds 150-mV offset at the output to • Output Pins Support ±8-kV IEC ESD Protection eliminate saturation or clipping concerns. The rail-to- • Ultra Small, WCSP 9-Ball Package: rail output supports either dc- or ac- coupling. – Tiny PCB Area: 0.96 mm x 0.96 mm (Typ) The THS7320 is available in an ultra small, 9-ball – Very Low Profile Height: 0.5 mm (Max) wafer chip-scale package (WCSP) package that 2 – Pitch: 0.3 mm requires an ultra small, 0.92-mm (typ) printed circuit board (PCB) area. APPLICATIONS • Personal Media Players • Digital Cameras • Cellular Phone Video Output Buffering Level 3-Pole Shift 20-MHz 75 W Out1 Channel1 2V/V 2V/V LPF R 75 W Level 3-Pole Shift 20-MHz 75 W Out2 Channel2 2V/V 2V/V LPF R 75 W DAC/Encoder Level 3-Pole Shift 20-MHz 75 W Out3 Channel3 2V/V 2V/V LPF R 75 W +2.6Vto+5V Enable Simplified Application Circuit 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2011–2012, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. THS7320 SBOS565B –JULY 2011–REVISED SEPTEMBER 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. PACKAGE/ORDERING INFORMATION(1) TRANSPORT MEDIA, PACKAGED DEVICES PACKAGE TYPE PACKAGE MARKING QUANTITY ECO STATUS(2) THS7320IYHCR DSBGA (9-Ball WCSP) QJK Tape and Reel, 3000 Pb-Free, Green THS7320IYHCT DSBGA (9-Ball WCSP) QJK Tape and Reel, 250 Pb-Free, Green (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. (2) Eco-Status information. Additional details including specific material content can be accessed at www.ti.com/leadfree. GREEN: TI defines Green to mean Lead (Pb)-Free and in addition, uses less package materials that do not contain halogens, including bromine (Br), or antimony (Sb) above 0.1% of total product weight. N/A: Not yet available Lead (Pb)-Free; for estimated conversion dates, go to www.ti.com/leadfree. Pb-FREE: TI defines Lead (Pb)-Free to mean RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and, if designed to be soldered, suitable for use in specified lead-free soldering processes. ABSOLUTE MAXIMUM RATINGS(1) Over operating free-air temperature range, unless otherwise noted. VALUE UNIT Supply voltage, VS+ to GND –0.4 to +5.5 V Video input voltage, video enable pin –0.4 to VS+ + 0.4 V Output current, IO ±75 mA Continuous power dissipation See Thermal Information table (2) Maximum junction temperature, any condition , TJ +150 °C (3) Maximum junction temperature, continuous operation, long-term reliability , TJ +125 °C Storage temperature range, Tstg +300 °C Human body model (HBM) 6000 V ESD ratings: all pins Charge device model (CDM) 1000 V Machine model (MM) 200 V ESD ratings: video output pins IEC 61000-4-2 contact discharge 20 kV (1) Stresses these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) The absolute maximum junction temperature under any condition is limited by the constraints of the silicon process. (3) The absolute maximum junction temperature for continuous operation is limited by the package constraints. Operation above this temperature may result in reduced reliability and/or lifetime of the device. RECOMMENDED OPERATING CONDITIONS MIN NOM MAX UNIT Supply voltage, VS+ 2.6 3 5 V Ambient temperature, TA –40 +85 °C 2 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Links: THS7320 THS7320 www.ti.com SBOS565B –JULY 2011–REVISED SEPTEMBER 2012 ELECTRICAL CHARACTERISTICS: VS+ = 3 V, Video Section At TA = +25°C, load = 150 Ω || 6.2 pF to GND, and dc-coupled input and output, unless otherwise noted. THS7320IYHC TEST PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1) AC PERFORMANCE –0.1 dB, relative to 1 MHz 11 MHz C Passband bandwidth ±1 dB, relative to 1 MHz 14 17 MHz A –3-dB bandwidth Relative to 1 MHz 17 20 MHz B f = 43 MHz, relative to 1 MHz –21 –12 dB A Normalized stop band gain f = 54 MHz, relative to 1 MHz –27 dB C Group delay f = 100 kHz 19 ns C Group delay variation f = 11 MHz with respect to 1 MHz 4 ns C Channel-to-channel delay 0.3 ns C Differential gain NTSC and PAL 0.1 % C Differential phase NTSC and PAL 0.1 ° C Total harmonic distortion f = 1 MHz, VO = 1.4 VPP –80 dB C 100 kHz to 13.5 MHz, non-weighted 65 dB C 100 kHz to 13.5 MHz, unified weighting 75 dB C Signal-to-noise ratio 100 kHz to 6 MHz, non-weighted 69 dB C 100 kHz to 6 MHz, unified weighting 78 dB C Rise/fall time VOUT = 2-V step 20 ns C Slew rate VOUT = 2-V step 80 V/µs C f = 12 MHz 1.4 Ω C Output impedance f = 12 MHz, return loss 41 dB C Disabled 20 || 11 kΩ || pF C Crosstalk Output referred at connectors, f = 10 MHz –51 dB C DC PERFORMANCE Biased output voltage VIN = 0 V 75 150 320 mV A Input voltage range At dc input, limited by output –0.03 to 0.65 V C Input bias current –1000 –130 –40 nA A Input resistance 2.4 || 2 MΩ || pF C Voltage gain 3.92 4 4.08 V/V A Gain matching Channel-to-channel –1 ±0.2 +1 % A OUTPUT CHARACTERISTICS High output voltage swing RL = 150 Ω to GND 2.62 2.8 V A Low output voltage swing RL = 150 Ω to GND 0.01 V C Output current Short-circuit 65 mA C (1) Test levels: (A) 100% tested at +25°C. Over temperature limits set by characterization and simulation. (B) Limits set by characterization and simulation only. (C) Typical value only for information. Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: THS7320 THS7320 SBOS565B –JULY 2011–REVISED SEPTEMBER 2012 www.ti.com ELECTRICAL CHARACTERISTICS: VS+ = 3 V, Video Section (continued) At TA = +25°C, load = 150 Ω || 6.2 pF to GND, and dc-coupled input and output, unless otherwise noted. THS7320IYHC TEST PARAMETER CONDITIONS MIN TYP MAX UNIT LEVEL(1) POWER SUPPLY (VS+) Operating Voltage VS+ 2.5 3 5.5 V B Video enable pin = 1.8 V, no load, VIN = 0 V 2.7 3.5 4.7 mA A VS+ total quiescent current Video enable pin = 0 V, no load, VIN = 0 V 0.15 1 µA A V power-supply rejection ratio S+ At dc 44 50 dB A (PSRR) VIDEO ENABLE LOGIC CHARACTERISTICS VIH Enabled 1.17 V A VIL Disabled 0.4 V A IIH Enable pin = 1.8 V, current flows into the pin 1.8 3 µA A IIH Enable pin = 3 V, current flows into the pin 3 5 µA A IIL Enable pin = 0 V, current flows into the pin –0.01 –0.5 µA A Input resistance 1 MΩ C Disable time 130 ns C Enable time 120 ns C THERMAL INFORMATION THS7320IYHC THERMAL METRIC(1) YHC UNITS 9 PINS θJA Junction-to-ambient thermal resistance 159.3 θJCtop Junction-to-case (top) thermal resistance 2.2 θJB Junction-to-board thermal resistance 2.4 °C/W ψJT Junction-to-top characterization parameter 8.9 ψJB Junction-to-board characterization parameter 88.4 θJCbot Junction-to-case (bottom) thermal resistance n/a (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

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