Assignment: LAB #7 and #8 PLC Relay Ladder Logic, Intel 8051 Assembly Language, Raspberry Pi ARM Assembly Language COURSE: EGR/CS333 “DIGITAL DESIGN & INTERFACING” (Digital Design II, Assembly Language, and Interfacing) SYLLABUS: http://users.etown.edu/w/wunderjt/syllabi/CS333%20Wunderlich,Joseph.htm INSTRUCTOR: J. Wunderlich PhD LATE PENALTY: Minus 33.3% per class period for each late item LAST REVISED: - PRE-LAB: 1. Read our Etown NanoLC PLC customized Simulator and Real-Time Device Control Manual: http://users.etown.edu/w/wunderjt/Info%20on%20Phoenix%20Contact%20NanoLC%20PLC.pdf including video on how to program NanoLC with Relay Ladder Logic: https://www.youtube.com/watch?v=i4wJFXCS9OU 2. Read our Etown Intel 80x51 customized Simulator and Real-Time Device Control Manual(s): a. 8051 Intel Microcontroller Development Board & Software, plus simulator (8051 Jumps & Calls) b. OPTIONAL: 2014 8051 Microcontroller Simulator and intro to Development Board and Software c. OPTIONAL: Pre-2013 Intel 80251 Microcontroller Board and Software (80251 Jumps & Calls) 3. Read our Etown Raspberry Pi customized Real-Time Device Control Manual(s): http://users.etown.edu/w/wunderjt/Raspberry%20Pi%20MANUAL%20and%20Labs.pdf DURING LAB: 1. AS A GROUP, convert your most complex working NanoLC program to-date into Relay Ladder Logic, and in your report compare and contrast it to your original program; along with demonstrating it fully functioning 2. AS A GROUP, simulate the two Intel 8051 Microcontroller Assembly Language programs shown in Dr Wunderlich’s publication below. Take screen shots of the memory map to show memory, registers, the stack, and PSW contents changing and put these in your report along with narrative explaining what’s happening, and arrows pointing to changing parts of the memory map. You don’t need a screen shot for every step above, but several screen shots at select steps should suffice. 3. AS A GROUP, do “Raspberry Pi Lab 3” ARM Microcontroller programming as shown below 4. AS A GROUP, after demonstrating all the above, demonstrate for the class TA all functioning and non-functioning parts of all equipment and all parts used in all class Lab Projects. Create a spreadsheet inventory of everything, and list whether or not it is functioning. Make two copies of the list; one for the TA and one for your report. GRADING: For both demonstrations and reports, a 92 is for everything done very well and professional. To get up to 100 or more, enhance things in creative ways GRADE PERCENTAGES and DUE DATES: Demonstrate PAD-234 Circuit Trainer circuits [primarily for 5 volt TTL chips] Demonstrate Old Circuit Trainer circuits [primarily for 5 volt TTL chips]: Demonstrate RadioShack Circuit Trainer circuits [primarily for ~3 volt CMOS chips]: Demonstrate Logisim Circuit simulations Demonstrate Phoenix Contact NanoLC PLC simulations (10%) FRIDAY 5/5/17 AT 3:30PM Demonstrate Phoenix Contact NanoLC PLC real-time systems (10%) FRIDAY 5/5/17 AT 3:30PM Demonstrate Phoenix Contact IEC-61131 PLC simulations: Demonstrate Phoenix Contact IEC-61131 PLC real-time systems: Demonstrate Field Programmable Gate Array (FPGA) simulations: Demonstrate Field Programmable Gate Array (FPGA) real-time systems: Demonstrate INTEL 8051/80251 microcontroller simulations: (20%) FRIDAY 5/5/17 AT 3:30PM Demonstrate INTEL 8051/80251 microcontroller real-time systems: Demonstrate Raspberry Pi real-time systems (ARM Assembly Language) (20%) FRIDAY 5/5/17 AT 3:30PM Demonstrate Arduino real-time systems: Demonstrate Basic-Stamp real-time systems: Demonstrate Direct PC-port real-time systems: Demonstrate Remote mobile-device real-time systems: Demonstrate LabView real-time systems: Demonstrate Isolated high-voltage bench-test (with low Voltage electronics disconnected) Written Group Report (including all individual Raspberry Pi work): (20%) FRIDAY 5/5/17 AT 3:30PM PowerPoint, Video, or Poster Demonstrate for the class TA all functioning and non-functioning parts (20%) FRIDAY 5/5/17 AT 3:30PM of all equipment and all parts used in all class Lab Projects. Elizabethtown College CS333 – Spring 2017 Raspberry Pi Lab #3 – ARM Assembly Code By Daniel Esteves & Joseph Wunderlich PhD 1- Introduction This lab is intended to introduce you to the ARM Architecture/Assembly Code. ARM has become the main processor for gadgets like Smart Phones, Tablets and the best one: Raspberry Pi. Lets go over some examples. 2- Examples This is the code for the “Hello World” file .data string: .asciz "\nHello World!\n" .text .global main .extern printf main: push {ip, lr} ldr r0, =string bl printf pop {ip, pc} To assemble, link and run files on ARM assembly code we need Terminal. 3- Terminal Lets start typing the traditional sudo apt-get update sudo apt-get upgrade OBS:You can use your favorite text editor in Terminal, but for this tutorial I will use nano. Create the assembly1.s file by typing sudo nano assembly1.s With nano opened you can type the Hello World example from above. Close the file by Pressing Control+X and when prompted if you would like to save the changes, press Y and save the file with the same name (assembly1.s). Now that we have the file done, lets assemble it. as –g –o assembly1.o assembly1.s Now, link it. gcc –o assembly1 assembly1.o The file is now assembled and linked. You can now run it by entering ./assembly1 Your screen should look like this. 5- Now you! 1- By doing the example you now know how to assemble an ARM assembly code program. Write a program that does the following: 1. Move the integer 13 to the Register R1 2. Move the integer 25 to the Register R2 3. Put the sum of Register R1 and R2 to Register R3 4. Move the value of R3 to R0 ATTENTION!! You will need to add the lines in the end of the file. This is called a system call and is needed to return the right value. MOV R7, #1 SVC 0 If you did everything right, in terminal you can enter echo $? Giving the answer to the sum. RULES FOR ALL LABS (always include this too in each lab report) IF LABS ARE BUILT (AND POSSIBLY REBUILT), BUT DON'T FULLY FUNCTION: For demonstrations and reports, deduct depends on how adequately you identify problems. For example, make test set-ups to verify functionality of isolated chips, circuit trainer elements, software, relays, other electronics, motors or other higher-voltage circuits and devices. PROVE THAT NO EASY FIX OR SUBSTITUTION WAS POSSIBLE or EASILY IDENTIFIABLE AT THE TIME. Discuss (1) How you identified problems, and (2) How you tried to fix them. Include evidence that you fully understand and have properly connected all pins on a given chip (including considering floating-pins, powering the chip, needed pull-up resistors, proper voltage levels, etc.), and that you have exhausted much time attempted to solve all problems). INCLUDE PHOTO’S OF ALL CIRCUITS (AND TEST-SET-UP’S) BUILT REPORTS must include: Title Page with lab number, name of lab, your names, Majors, Year (e.g., Junior), who is demonstrating, and who is the designated TEAM LEADER Sections numbered and tilted as follows (always list all of these, and simply put “NA” if not applicable): 1. “Assignment” (An exact copy of everything in this document -- exactly how it looks here) 2. “Equipment Used” (A list of hardware and software) INCLUDE PHOTO’S OF ALL EQUIPMENT 3. “Methodology” (including all design steps, analysis, DECISIONS MADE, etc.) INCLUDE PHOTO’S OF ALL CIRCUITS BUILT 4. “Options” (if applicable, a comparison of each method used) 5. “Problems Encountered” (including any debugging methodology) INCLUDE PHOTO’S OF ANY TEST-CIRCUITS BUILT 6. “Testing Methodology” (including timing traces, test-vectors, and RATIONALE FOR HOW YOUR METHODOLOGY ASSURES QUALITY COVERAGE including estimated probability of satisfactory coverage by chosen test vectors 7. “References” (in standard IEEE format) 8. “Appendices” (for spec sheets, etc.) ALL DESIGN PROCESS STEPS MUST BE INCLUDED for Digital Logic designs (NUMBERED as in EGR/CS 332). If design step not done, list as “N.A.” For Combinational Digital Logic Design: Step 1: Define problem, Step 2: Encode variables, Step 3: Create truth table, Step 4: Find simplified function(s), Step 5: Draw logic circuit, Step 6: Convert to NAND’s, Step 7: Check assumptions, Step 8: Chip circuit diagram For Sequential Digital Logic Design::Step 1: Define problem, Step 2: Create state diagram, Step 3: Encode variables, Step 4: Minimize machine, Step 5: Create state table, Step 6: Append flip-flop inputs, Step 7: Find simplified function(s), Step 8: Draw logic circuit, Step 9: Convert to NAND’s Step 10: Analyze any unused states, Step 11: Revise state diagram, Step 12: Check Assumptions, Step 13: Chip circuit diagram COLOR-CODED LOGIC DIAGRAMS are required for any digital circuit (Breadboard, FPGA, etc.) COLOR-CODED CIRCUIT SCHEMATICS are required for any circuit implemented (Breadboard, PLC, ladder logic, etc.), color is a must, hand-colored is ok FLOW CHART is required for any program COMMENT EVERY LINE OF CODE TEAM LEADER has responsibility of coordinating all equipment problems with the Teaching Assistant. Try to stick with same person for this role. TEACHING ASSISTANT will guarantee all working hardware and software when needed and will facilitate acquisition of needed parts. .