r;:I. ~ CONTR.OL DATA r;:l c::\ CONTR.OL DATA \::J r:::J CORPOR[\TION MEf\~O \!:J r::.; CORPOR[\TION FROM e)l.T. LOC .... TION: TO. ------'LOCATIOH. IFROM Baseline Change LDCA liON: ~~-~~~~;~pma~----~L~~~~~~ [. H. Michehl ____--'--'2=..!;!bb9 ARH293 Distribut=-i=-on~~ ______~_L- ___L___ ~C~ntrol Board ~~HOP~ __ SUS;Eel, OATE; ~-- OATE: _fyO[~~O_~~.~/R~,~R~e~v~.~~(~ ____________________________~b 112/7B EffJt9; of AO/R Revisl.tms on Exis.tin9..JlRL'~s"--______________-lb1bntL __ Attached is the NPP-approved (VSER 180 Architectural Objectives, Revision C. This document should be reviewed against existing DR's per the accs direction memo of b/b/7B. When Revision ( of the (YBER lBO AO/R is approved by NPP, the following The three change summaries attached outline changes in content between procedure applies. Revision B {Rev. 9} and Revision C {Rev. 12}. Please submit your updated statements of comoliance to the NPP Program Office as soon as All projects operating against an existing CVeER 180 DR will carefully possible. review the revised AO/R and submit a new statement of compliance to the CVSER 180 Program Office within 10 working days of AO/R distribution. -12E. H. Mi~~h-e~h'l------~ DIt' ector AD&C /?/! . paj ~!1 'i,. 1'4 . 1<'' i!," ///~!.. ~-~7 H.Ny-Fr'pzie 6'178 L. V ~~11 J. tfclla e h <i{t 7/1 Attachments Vice Pr~sident Via President Vice p,f.esident 'Comput~r Programming New Product Program Computer Development Division ,,. I \ "~II'''n IN II.'.'. EHM L/102178 CHANGES - REV. 11 TO REV. ka Section 7.11.11.'1 Two sentence~ were removed as irrelevant: Section ].. Restricting objectives to R1 Clarifies S1/THETA project.objectives without compromising 2. Comparative CPU times. product line objectives.. 7.11.'1.].0.1 Paragraph removed - not directly related to objectives. No. 1~ - a reference for security design objectives. 7.5·1 BASIC speeds and benchmarks redefined. Clarifi~s between sensing and recording in the power system. &.2·3 Will support CYBERAMA. More precision on which disks are brought up by single button power-on. 8.'1 Clarification. hQuietJzingh dropped as a generally required option. 8. '1.7 MTTR average includes necessary trioS for parts. Feature matrix moved to section 11.1.5. Clarify assumption regarding degraded interruption~ Auto Power Recovery is to re~ui~e a 2~S second ride- through MG Set. .. 8.b.1I Clarifies critical PSR status of initial release. Further definition of short and long warnings. '1.], DoD Security Compliance is no longer excluded. Clarification, modification for performance is encouraged·. S} - Sam~ fUnction, iess implementation det~il. 10.'1.]. lD} - Clearer terminology. ].0. '1.2 Clarification of intent, remote maintenance interfaces 1'1} - Eliminates redundant information. are standard, the subsystem remains to be def5ned. Clarification of intent relative to compilers and compiler users. 2 port MUX is part of the basic mainframe in both C170 and (180 state· o.S. independence made a general product set requirement. MG Set Options reduced to eliminate proliferation of In the matrix - added ~PASCAL {~irth PASCAL}. development projects. 17} - Corrects compatibility objective of ALGOl LO Maintenance cost objectives stated in dollars and %. relative to ALGOL b8 Minimum THETA configuration is 11MB. Maximum defined Classification "medium, large and very ~arge" revised. real memory now is 32MB. O.S. independence requirement moved to Section 3.Q.1. Clarifies future terminals intent and relation to .(YBER 180 will comply with basis DoD security requirements. value added networks. Maximum terminal capacity {logical} has been.expanded. 12.".2-3 System Power cost changes. The Basic O.S. Is also prohibited from source code 12.5 Previous forecasts have been dropped. release for system software security considerations. 12.7.2 Schedul clarification~ Dual State link is a ].70/].80 feature only. MMF shared peripherals restricted to RMS and Front-ends~ 12.7.2.2.5 Some items delayed until b/7'1. User validation phased over 2 releases. Accounting phased over 2 releases~ Tasking added to Rl. Job· Dependency t~ R2. lBO state Basic tape I/O and volumes to R1. Online maintenance of tape in Rl via (170. Index Sequential to Rl~ All of DBnS ph,ased. ~ Change Summary - CYBtR 180· AO/R Second »rart or Rev. C {Rev. 11} Qu, /0 -h., (4w' I Section Section Minor wording changes to clarify the role of automatic power recovery. Requires that automatic power recovery Major Objectives - The specific areas of emphasis for be implemented in a safe manner. SJ, and THETA have been noted along with potential for impact on priority trade-off? The time constraints of short and long warnings are clarified. ]'.3.]' The release dates for 51 have been clarified. CEM does not mon1tor E5M or E~5. ],.3.3 The base for perforMance measurement remains CVBER 73. Added bullet regarding one button power for equipment other than the basic elements •. 2.0 Reference 10 has been updated and reference lS added. ~larifies the relationship of eq~ipment monitoring and power availability to peripherals in a multi-mainframe 3.]'.]'.], Per request of Engineering the terminology for inputl configuration. output unit.has been revl~ed. A reference to PP usage has been dropped {it was redundant The probable support of a two·IOU configuration has been to the earlier description}. noted and a reference to varying memory capacities added. The entire section'on Transaction Processing has been 3.},.J,.11 Minor wording changes to reduce the confusion regarding rp.placed. common memory vs. shared memory {the latter is low cost communication medium for dual mainframe configurations Sentence calling program structuring a subset of CYBER 170 only}. All other multi-mainframe configurations are Segment loader has'been dropped, was misleading. The independent of requirements for a common memory and the discussion of relative importance of loading performance term has been dropped. vs. generalized library format has been clarified. Batch processing has been dropped In p~iority and further The requirements for interchangeabre fi Ie formats, ('tc. clarification on the relationship between transaction have been clarified to apply to compilers and system processing and ti me-shar.ing has been made· util.ities {removing the requirement from data manag'ement subsystems}. c} Clarifies the 51 channel restrictions functionally remains the same, the implication of multiple f} defines the 2 port console multiplexor and reserves separate files has been removed. ], port for remote hardware and software maintenance. further modification/clarification to the accounting section, Clarifies the PP's·restricted accessing to central , memory as a software restriction. Clarifies PP software's A minimum configuration for pure 170 state has been added relationship to controlware. to support performance objectiVes in section 7. Adds requirement for controllers to interface to the 3. 11. L The applicability of these general product set technical configuration environment monitor. requirements to interpretive compilers is clarified. Severa' minor typographical corrections are made within the paragrapl Defines the minimum functional' characteristics of the The very last bullet regarding CYBER 180 system interface basic operator control console, beyond which operating standard was redundant and removed. system or diagnostic software cannot use. Clarifies the role of the (VBER 170 (C545 console with regard to Requires that Class I-III compilers must all honor the these requirements {the role of the (C54S In (180 System Interface Standard. Minor changes support levels systems remains weekly defined.} in the descriptive matrix. Add transaction interface to the matrix. Temperature monitoring and power control need not be "internal" to a mainframe. Clarifies the use of the Clarifies fORTRAN's relationship to ANSI standard. dewpoint recorder. on 180 systems. Revises the power Restructures (OBOl section with no change of content. requirement for multi-mainframe configurations to greater Clarifies BASIC relationsh)p between interpretive and power supply availability for shared elements. Clarifies object code generation. Several minor editorial changes motor generator sets options. made to the other paragraphs with no change in substance. Section Editorial changes have been made to improve clarity without changing basic con-tent; "Random memory management" "Min~r degradation in perform~nce" means compile speed. dropped - only a confusion factor. Global cross'reference listings .pply to PASCAL, SyMPl. Requirement fora Direct access method has been added. and the assembler. {The Basic Operating System-will no longer support a built-in Actual Key access method.} 1..0 This section has tieen completely rewritten in response to many questions. It should be carefully reviewed, although The last bullet regarding design trade-offs was removed. it is still preliminary. - This information also appears in the design priority The relationship of the 6nvironments and Uorkload Spec matrix. to these performance objectives is dbscribed. The DBMS requirement description of concurrent access drops "improved performance for key batch jobs." Dual The BMCaD performance base has been corrected {the base logging and dual recording has been changed to a separate, line had been measured incorrectly on a CVeER 73}. medium priority, -item. Performance ratio for P3 PASCAL-X changed from 8.7 ~o A definition of data base sizes has been added. Several 8." and special cases dropped to conform to the objectives minor editorial changes are made to this section. in Rev. B. This section has been revised for greDter clarity. Data Dictionary System{s} allows a choice between one ' generali~ed or two specialized products. The block copy performance requirement applies to all systems not just THETA. APl 2 replaces APlUM. Requirement clarified to specify dual mainframe shared Some priority changes have been made for DDl. All memory not a generalized common memory. priority If's dropped. The paragraph has been flagged as preliminary. 7.11.2 Terminology for the IOU cleaned up.