AN-0996 APPLICATION NOTE One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com The Advantages of Using a Quadrature Digital Upconverter (QDUC) in Point-to-Point Microwave Transmit Systems by David Brandon, David Crook, and Ken Gentile INTRODUCTION Direct conversion and super heterodyne transmitter architec- taken to avoid introducing any group delay variation between tures are commonly used in wireless systems. This application the reconstruction filter because this introduces modulation note briefly reviews the pros and cons of each approach (addi- distortion resulting in EVM degradation. tional resources are listed in the References section) and also The filtered baseband I/Q signals along with the LO signal drive offers an architectural option (direct real IF) that is well suited the corresponding I/Q and LO inputs of an analog quadrature for IF generation in the indoor unit (IDU) section of a microwave modulator. The quadrature modulator produces a modulated point-to-point radio. RF waveform at a carrier frequency that is equal to the LO DIRECT CONVERSION frequency. This modulated output signal is band filtered (to A direct conversion transmitter is shown in Figure 1. This remove out-of-band spurs) and amplified by the PA circuitry. architecture is favored for its simplicity and low cost relative to A common problem associated with this approach is referred the super heterodyne approach. The key architectural blocks to as LO leakage: the presence of the LO signal within the include an AD9779 dual baseband digital-to-analog converter modulated signal bandwidth. Since this distortion term is in- (DAC), associated reconstruction filters, an AD8349 or band, it cannot be filtered out. The origin of this error is related ADL537x analog quadrature modulator, band filter, and power to parasitic coupling as well as mismatches in the dc compo- amplifier (PA) circuitry. An RF PLL produces the local nents of the signals at the modulator inputs. This includes DAC oscillator (LO) signal that drives the modulator. offsets as well as input offset voltages associated with the analog The dual DAC outputs generate in-phase and quadrature (I/Q) quadrature modulator. It is possible to cancel this effect by components of a complex baseband signal resulting from applying a compensating offset signal from the DAC. For a modulation mapping, pulse shaping, and upsampling (via robust solution, however, this correction signal must track interpolation filters) to the DAC sample clock frequency. The errors due to temperature and supply voltage variations. DAC reconstruction filters are usually implemented with inexpensive discrete inductors and capacitors. Care must be AD8349 AD9779 ADL537x RECONSTRUCTION FILTER I DAC BAND FILTER DSP DIGITAL 0/90 VGA PA FILTERING RECONSTRUCTION FILTER DAC Q CLOCK RF LO GENERATION PLL AMP RMS ADC DETECTOR 07997-001 Figure 1. Block Diagram of Direct Conversion Tx Architecture Rev. 0 | Page 1 of 8 AN-0996 Application Note TABLE OF CONTENTS Introduction ...................................................................................... 1 Direct Real IF .....................................................................................4 Direct Conversion ............................................................................ 1 References .......................................................................................7 Super Heterodyne ............................................................................. 3 Rev. 0 | Page 2 of 8 Application Note AN-0996 Another problem encountered with this architecture relates SUPER HETERODYNE to the impact of I/Q imbalance. Sources include DAC output Figure 2 shows the super heterodyne architecture, which, like power and/or reconstruction filter mismatches as well as phase the direct conversion architecture, contains dual baseband and/or magnitude errors contributed by the analog quadrature DACs and their associated reconstruction filters. These operate modulator. It is possible to compensate for these errors by in a manner similar to direct conversion, except that the analog adding compensating amplitude and phase adjustments onto quadrature modulator and first LO (IF LO) modulate the the DAC output signal. These compensating signals also need complex baseband signal onto a lower frequency IF carrier to track the error terms across supply voltage and temperature signal, rather than directly onto the final RF carrier signal. This variations. Furthermore, the compensation algorithm introduces improves the modulator dynamic performance relative to the additional complexity into the linearization scheme. direct conversion approach because the modulator operates at a The third key drawback of the direct conversion approach lower frequency (IF instead of RF). relates to a phenomenon called injection pulling of the LO by Typically, a surface acoustic wave (SAW) filter band limits the the output of the PA. This arises because the output frequency signal at the output of the IF stage, which effectively filters the of the PA is the same as that of the LO, but contains other undesired spurious signals at this point in the signal chain. A nearby frequencies associated with the modulation process. single mixer and RF LO then translate the IF signal up to the These frequencies couple back onto the LO as the PA output is RF carrier frequency. Another band filter is needed at the RF modulated and effectively pulls the frequency slightly off the output to reject the image produced by the mixing process as desired LO frequency, thereby contributing to EVM error. well as any RF LO leakage that might be present. Employing a Various isolation techniques can minimize this effect, such as high IF helps because it places the desired signal further from shielding and best practice PCB layout. Another technique uses the LO leakage term, making the filtering task easier. an offset VCO to produce a carrier frequency that is offset just The super heterodyne approach has problems similar to the enough from the LO frequency to prevent injection pulling. direct conversion approach due to the IF stage, which is This technique obviously adds the cost of another VCO and the susceptible to LO leakage and I/Q imbalance. The key disad- associated PLL circuitry. vantage with this approach is the higher component count Despite these drawbacks, the direct conversion approach is and associated cost. an increasingly popular option due to improvements in the The key advantages are the absence of LO injection and the performance characteristics of the analog quadrate modulator, removal of unwanted spurious content from the transmitted enhanced techniques for using compensation signals from the spectrum by the IF and RF band filters. DAC to cancel error terms, and its relative simplicity and competitive cost. AD8349 AD9779 ADL537x RECONSTRUCTION FILTER I DAC IF BAND FILTER FILTER DSP DIGITAL 0/90 VGA PA FILTERING LO RECONSTRUCTION FILTER DAC Q IF CLOCK RF GENERATION PLL AMP RMS ADC DETECTOR 07997-002 Figure 2. Block Diagram of Super Heterodyne Tx Architecture Rev. 0 | Page 3 of 8 AN-0996 Application Note DIRECT REAL IF Figure 3 shows the direct real IF architecture. This implementation is similar to the super heterodyne approach shown in Figure 2, except that the IF signal comes from a quadrature digital upconverter (QDUC). Figure 4 shows an example of a QDUC (the AD9957) in block diagram form. AD9857 AD9957 I RECONSTRUCTION BAND FILTER FILTER DIGITAL 0/90 DSP FILTERING DAC VGA PA DEMUX LO POWER RAMP Q PROFILE CLOCK RF GENERATION PLL AMP RMS ADC DETECTOR 07997-003 Figure 3. Block Diagram of Direct IF Tx Architecture Rev. 0 | Page 4 of 8 Application Note AN-0996 AD9957 18 I CCI 16 CCI INVERSE (1× TO 63×) HALF-BAND FILTERS (4×) FILTERS 8 AUX DAC GAIN IS DAC 18 PW DDS 8-BIT DAC_RSET I/Q IN θ QS cos (ωt+θ) IOUT ω DAC 16 14-BIT IOUT sin (ωt+θ) BLACKFIN INTERFACE 18 FTW CCI CCI Q SINC OUTPUT FILTER INVERSE INVERSE SCALE (1× TO 63×) HALF-BAND FILTERS (4×) FILTERS FACTOR DATA ASSEMBLER AND FORMATTER REFCLK_OUT OSK SYSCLK ÷2 PDCLK REF_CLK PARALLEL DATA INTERNAL CLOCK TIMING AND CONTROL TIMING AND CONTROL PLL REF_CLK TxENABLE CLOCK MODE POWER XTAL_SEL FTW PROGRAMMING SERIAL I/O RAM DOWN PW REGISTERS PORT CONTROL 2 2 3 I Q IS QS R RT CS SDO OSK SDIO SCLK PROFILE SYNC_IN CCI_OVFL I/O_RESET PLL_LOCK SYNC_OUT I/O_UPDATE EXT_PWR_DWN MASTER_RESET 7997-004 0 PLL_LOOP_FILTE Figure 4. Detailed Block Diagram of AD9957 QDUC Rev. 0 | Page 5 of 8 AN-0996 Application Note A QDUC takes in the digital baseband I and Q data, which can range from 6 GHz to 11 GHz for medium to long paths and is modulation mapped and pulse shaped. In the case of the up to 23 GHz for shorter paths. These carrier frequencies AD9957, I and Q data-words are delivered in time-interleaved require an additional upconversion even for the currently fashion (I word, Q word, I word, and so on) at a rate of up to realizable direct conversion approaches. 250 megawords per second. This enables the AD9957 to upconvert A key advantage of the direct real RF approach is that extremely very wide bandwidth signals, such as those required for point- accurate I and Q matching is achievable because the quadrature to-point microwave systems. This digital baseband data is modulation function occurs completely within the digital upsampled in the QDUC by a chain of half-band interpolation domain. Similarly, due to the digital implementation, LO or filters followed by a CCI filter. The upsampled digital baseband carrier leakage at the IF stage is very low, about −75 dBc. signal feeds a digital quadrature modulator. The LO signal for the digital modulator comes from a quadrature NCO with a Another advantage of the direct real RF architecture is the 32-bit frequency tuning word. extremely fine tuning resolution at the IF due to the NCO. This adds increased flexibility to transmitter frequency planning. The output of the digital modulator is a modulated digital Depending on the application, the actual RF channel tuning can carrier at the frequency set by the NCO.