Switched-Capacitor Circuits University of Toronto 1 of 48 © D. Johns, K. Martin, 1997 Basic Building Blocks Opamps • Ideal opamps usually assumed. • Important non-idealities — dc gain: sets the accuracy of charge transfer, hence, transfer-function accuracy. — unity-gain freq, phase margin & slew-rate: sets the max clocking frequency. A general rule is that unity-gain freq should be 5 times (or more) higher than the clock-freq. — dc offset: Can create dc offset at output. Circuit techniques to combat this which also reduce 1/f noise. University of Toronto 2 of 48 © D. Johns, K. Martin, 1997 Basic Building Blocks Double-Poly Capacitors C metal 1 metal poly1 Cp1 thin oxide bottom plate C1 poly2 Cp2 thick oxide C p1 Cp2 (substrate - ac ground) cross-section view equivalent circuit • Substantial parasitics with large bottom plate capacitance (20 percent of C1) • Also, metal-metal capacitors are used but have even larger parasitic capacitances. University of Toronto 3 of 48 © D. Johns, K. Martin, 1997 Basic Building Blocks Switches φ φ Symbol n-channel v1 v2 v1 v2 φ transmission φ φ gate v1 v p-channel v 2 1 v2 φ • Mosfet switches are good switches. — off-resistance near GΩ range — on-resistance in 100Ω to 5kΩ range (depends on transistor sizing) • However, have non-linear parasitic capacitances. University of Toronto 4 of 48 © D. Johns, K. Martin, 1997 Basic Building Blocks Non-Overlapping Clocks φ1 T V φ on φ1 Voff n – 2 n – 1 n n + 1 tT⁄ 1 delay φ fs ≡ --- delay V 2 T on φ Voff 2 n – 32⁄ n – 12⁄ n + 12⁄ tT⁄ • Non-overlapping clocks — both clocks are never on at same time • Needed to ensure charge is not inadvertently lost. • Integer values occur at end of φ1. • End of φ2 is 1/2 off integer value. University of Toronto 5 of 48 © D. Johns, K. Martin, 1997 Switched-Capacitor Resistor Equivalent φ φ 1 2 Req V V V1 V2 1 2 C1 T ∆QC= ()V – V every clock period Req = ------ 1 1 2 C1 Qx = CxVx (1) • C1 charged to V1 and then V2 during each clk period. ∆Q1 = C1()V1 – V2 (2) • Find equivalent average current C ()V – V I = ----------------1 1--------------2 (3) avg T where T is the clk period. University of Toronto 6 of 48 © D. Johns, K. Martin, 1997 Switched-Capacitor Resistor Equivalent • For equivalent resistor circuit V1 – V2 Ieq = ------------------ (4) Req • Equating two, we have T 1 Req ==------ ---------- (5) C1 C1fs • This equivalence is useful when looking at low-freq portion of a SC-circuit. • For higher frequencies, discrete-time analysis is used. University of Toronto 7 of 48 © D. Johns, K. Martin, 1997 Resistor Equivalence Example • What is the equivalent resistance of a 5pF capacitance sampled at a clock frequency of 100kHz. • Using (5), we have 1 R ==--------------------------------------------------------- 2MΩ eq –12 3 ()510× ()100× 10 • Note that a very large equivalent resistance of 2MΩ can be realized. • Requires only 2 transistors, a clock and a relatively small capacitance. • In a typical CMOS process, such a large resistor would normally require a huge amount of silicon area. University of Toronto 8 of 48 © D. Johns, K. Martin, 1997 Parasitic-Sensitive Integrator vc2()nT φ1 φ2 C vcx()t 2 φ1 vci()t vco()t vc1()t C1 v ()n = v ()nT vi()n = vci()nT o co • Start by looking at an integrator which IS affected by parasitic capacitances • Want to find output voltage at end of φ1 in relation to input sampled at end of φ1. University of Toronto 9 of 48 © D. Johns, K. Martin, 1997 Parasitic-Sensitive Integrator C2 C2 v ()nT– T ci vci()nT– T ⁄ 2 C 1 v ()nT– T C1 co vco()nT– T ⁄ 2 φ1 on φ2 on • At end of φ2 C2vco()nT– T ⁄ 2 = C2vco()nT– T – C1vci()nT– T (6) • But would like to know the output at end of φ1 C2vco()nT = C2vco()nT– T ⁄ 2 (7) • leading to C2vco()nT = C2vco()nT– T – C1vci()nT– T (8) University of Toronto 10 of 48 © D. Johns, K. Martin, 1997 Parasitic-Sensitive Integrator • Modify above to write C1 vo()n = vo()n – 1 – ------ vi()n – 1 (9) C2 and taking z-transform and re-arranging, leads to Vo()z C1 1 Hz()≡ ------------ = –------ ----------- (10) Vi()z C2 z – 1 • Note that gain-coefficient is determined by a ratio of two capacitance values. • Ratios of capacitors can be set VERY accurately on an integrated circuit (within 0.1 percent) • Leads to very accurate transfer-functions. University of Toronto 11 of 48 © D. Johns, K. Martin, 1997 Typical Waveforms φ1 t φ2 t vci()t t vcx()t t vco()t t University of Toronto 12 of 48 © D. Johns, K. Martin, 1997 Low Frequency Behavior • Equation (10) can be re-written as C z–12/ Hz()= – ------1 ---------------------------- (11) 12/ –12/ C2 z – z • To find freq response, recall ze==jωT cos()ωT + jsin()ωT (12) ωT ωT z12/ = cos------- + jsin------- (13) 2 2 ωT ωT z–12/ = cos------- – jsin------- (14) 2 2 ωT ωT cos------- – jsin------- jωT C1 2 2 He()= –------ --------------------------------------------------- (15) C ωT 2 j2sin------- 2 University of Toronto 13 of 48 © D. Johns, K. Martin, 1997 Low Frequency Behavior • Above is exact but when ωT « 1 (i.e., at low freq) jωT C1 1 He()≅ –------ --------- (16) C2 jωT • Thus, the transfer function is same as a continuous- time integrator having a gain constant of C1 1 KI ≅ ------ --- (17) C2T which is a function of the integrator capacitor ratio and clock frequency only. University of Toronto 14 of 48 © D. Johns, K. Martin, 1997 Parasitic Capacitance Effects Cp3 Cp4 C2 φ1 φ2 φ1 vi()n vo()n C1 Cp1 Cp2 • Accounting for parasitic capacitances, we have C1 + Cp1 1 Hz()= –---------------------- ----------- (18) C2 z – 1 • Thus, gain coefficient is not well controlled and partially non-linear (due to Cp1 being non-linear). University of Toronto 15 of 48 © D. Johns, K. Martin, 1997 Parasitic-Insensitive Integrators C2 φ1 φ C 2 1 φ v ()t 1 ci vco()t φ2 φ1 vi()n = vci()nT vo()n = vco()nT • By using 2 extra switches, integrator can be made insensitive to parasitic capacitances — more accurate transfer-functions — better linearity (since non-linear capacitances unimportant) University of Toronto 16 of 48 © D. Johns, K. Martin, 1997 Parasitic-Insensitive Integrators C 2 C2 vci()nT– T vci()nT– T ⁄ 2 + - C - 1 C1 vco()nT– T + vco()nT– T ⁄ 2 φ1 on φ2 on • Same analysis as before except that C1 is switched in polarity before discharging into C2. Vo()z C1 1 Hz()≡ ------------ = ------ ----------- (19) Vi()z C2 z – 1 • A positive integrator (rather than negative as before) University of Toronto 17 of 48 © D. Johns, K. Martin, 1997 Parasitic-Insensitive Integrators Cp3 Cp4 C2 φ1 φ C 2 1 φ1 vi()n vo()n φ2 φ1 Cp1 Cp2 • Cp3 has little effect since it is connected to virtual gnd • Cp4 has little effect since it is driven by output • Cp2 has little effect since it is either connected to virtual gnd or physical gnd. University of Toronto 18 of 48 © D. Johns, K. Martin, 1997 Parasitic-Insensitive Integrators • Cp1 is continuously being charged to vi()n and discharged to ground. • φ1 on — the fact that Cp1 is also charged to vi()n – 1 does not affect C1 charge. • φ2 on — Cp1 is discharged through the φ2 switch attached to its node and does not affect the charge accumulating on C2. • While the parasitic capacitances may slow down settling time behavior, they do not affect the discrete-time difference equation University of Toronto 19 of 48 © D. Johns, K. Martin, 1997 Parasitic-Insensitive Inverting Integrator C2 φ1 φ1 C1 φ1 vi()n vo()n Vi()z φ2 φ2 Vo()z C2vco()nT– T ⁄ 2 = C2vco()nT– T (20) C2vco()nT = C2vco()nT– T ⁄ 2 – C1vci()nT (21) • Present output depends on present input(delay-free) Vo()z C1 z Hz()≡ ------------ = –------ ----------- (22) Vi()z C2 z – 1 • Delay-free integrator has negative gain while delaying integrator has positive gain. University of Toronto 20 of 48 © D. Johns, K. Martin, 1997 Signal-Flow-Graph Analysis C1 V1()z φ φ 1 C 2 2 CA V2()z φ φ 2 1 φ1 V ()z φ1 φ1 o C3 V3()z φ2 φ2 –1 –C1()1 – z V1()z –1 C2z 1 1 ------- ---------------- V ()z –1 V ()z 2 CA 1 – z o –C3 V3()z University of Toronto 21 of 48 © D. Johns, K. Martin, 1997 First-Order Filter Vin()s Vout()s • Start with an active-RC structure and replace resistors with SC equivalents. • Analyze using discrete-time analysis. University of Toronto 22 of 48 © D. Johns, K. Martin, 1997 First-Order Filter φ φ 1 1 φ1 φ1 C2 C3 φ2 φ2 φ2 φ2 CA φ C1 1 Vi()z Vo()z –C3 –C2 1 1 V z ------- ---------------- V ()z i() –1 o CA 1 – z –1 –C1()1 – z University of Toronto 23 of 48 © D. Johns, K. Martin, 1997 First-Order Filter –1 –1 CA()1 – z Vo()z = – C3Vo()z – C2Vi()z – C1()1 – z Vi()z (23) C1 C2 ------- ()1 – z–1 + ------- CA CA –------------------------------------------------------ Vo()z C Hz()≡ ------------ = 1 – z–1 + ------3- (24) V ()z i CA C1 + C2 C ------------------- z – ------1- CA CA = –----------------------------------------- C 1 + ------3- z – 1 CA University of Toronto 24 of 48 © D. Johns, K. Martin, 1997 First-Order Filter • The pole of (24) is found by equating the denominator to zero CA zp = -------------------- (25) CA + C3 • For positive capacitance values, this pole is restricted to the real axis between 0 and 1 — circuit is always stable.