Slide Set 14 for ENCM 369 Winter 2014 Lecture Section 01 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Winter Term, 2014 ENCM 369 W14 Section 01 Slide Set 14 slide 2/66 Contents Introduction to Floating-Point Numbers MIPS Formats for F-P Numbers IEEE Floating-Point Standards MIPS Floating-Point Registers Coprocessor 1 Translating C F-P Code to to MIPS A.L. Quick Overview of F-P Algorithms and Hardware Some Data and Remarks about Speed of Arithmetic ENCM 369 W14 Section 01 Slide Set 14 slide 3/66 Outline of Slide Set 14 Introduction to Floating-Point Numbers MIPS Formats for F-P Numbers IEEE Floating-Point Standards MIPS Floating-Point Registers Coprocessor 1 Translating C F-P Code to to MIPS A.L. Quick Overview of F-P Algorithms and Hardware Some Data and Remarks about Speed of Arithmetic ENCM 369 W14 Section 01 Slide Set 14 slide 4/66 Introduction to floating-point numbers We've finished ENCM 369 coverage of integer representations and arithmetic. We're moving on to floating-point numbers and arithmetic. (Section 5.3.2 in the textbook for concepts; 6.7.4 for a very brief introduction to MIPS floating-point registers and instructions.) Floating-point is the generic name given to the kinds of numbers you've seen in C and C++ with types double and float. ENCM 369 W14 Section 01 Slide Set 14 slide 5/66 Scientific Notation This is a format that engineering students should be very familiar with! Example: 6:02214179 × 1023 mol−1 Example: −1:60217656 × 10−19 C Floating-point representation has the same structure as scientific notation, but floating-point typically uses base two, not base ten. ENCM 369 W14 Section 01 Slide Set 14 slide 6/66 Introductory floating-point example A programmer gives a value to a constant in some C code: const double electron_charge = -1.60217656e-19; The C compiler will use the base ten constant in the C code to create a base two constant a computer can work with. When the program runs, the number the computer uses is −1:0111101001001101101000010110101110011100011110101101 × two−111111, which is very close to but not exactly equal to −1:60217656 × 10−19. ENCM 369 W14 Section 01 Slide Set 14 slide 7/66 Names for parts of a non-zero floating-point number significand exponent 00001011 -1 .01001100011010111010111 × two fractionsign The significand includes bits from both sides of the binary point. Another name for significand is mantissa. (Note: This is not base ten, so we should not use the term decimal point!) The fraction is the part of the significand that is to the right of the binary point. So the fraction represents some number that is ≥ 0 but < 1. ENCM 369 W14 Section 01 Slide Set 14 slide 8/66 Normalized non-zero floating-point numbers In normalized form, an f-p number must have a single 1 bit immediately to the left of the binary point, and no other 1 bits left of the binary point. Therefore, the significand of a normalized number must be ≥ 1:0 and must also be < 10:0two: (In English: greater than or equal to one, strictly less than two.) ENCM 369 W14 Section 01 Slide Set 14 slide 9/66 Normalized non-zero f-p numbers: examples Which of the following are in normalized form? 00000101 I A. −1:00000000 × two 00100101 I B. +10:0000000 × two 00010111 I C. +1:10001011 × two 00001100 I D. −0:11101100 × two 01001100 I E. +101:111011 × two ENCM 369 W14 Section 01 Slide Set 14 slide 10/66 Example conversion from base ten to base-two floating-point What is 9:375ten expressed as a normalized f-p number? What are the sign, significand, fraction, and exponent of this normalized f-p number? ENCM 369 W14 Section 01 Slide Set 14 slide 11/66 Standard organizations for bits of floating-point numbers For computer hardware to work with f-p numbers there must be precise rules about how to encode these numbers. The most usual overall sizes for f-p numbers are 32 bits or 64 bits, but other sizes (e.g., 16, 80, or 128 bits) are possible. We need one bit for the sign and some number of bits for information about the exponent; the remaining bits can be used for information about the significand. ENCM 369 W14 Section 01 Slide Set 14 slide 12/66 Sign information for non-zero f-p numbers This requires a single bit. A sign bit of 0 is used for positive numbers. A sign bit of 1 is used for negative numbers. ENCM 369 W14 Section 01 Slide Set 14 slide 13/66 Exponent information for a non-zero f-p numbers Exponents in f-p numbers are signed integers! f-p numbers with small magnitudes will have negative exponents. So of course two's complement is used for exponents, right . ? WRONG! In fact, an alternate system for signed integers, called biased notation, is used for exponents in f-p numbers. (This fact explains why many introductions to two's-complement systems state that two's complement is almost always used for signed integers in modern digital hardware.) ENCM 369 W14 Section 01 Slide Set 14 slide 14/66 How does biased notation work? The biased exponent is equal to the actual exponent plus some number called a bias. The bias is chosen so that roughly half the allowable actual exponents are negative, and roughly half are positive. Example: The bias for an 8-bit exponent is 127ten, or 0111_1111two. If the actual exponent is 3ten, what is the biased exponent in base ten and base two? ENCM 369 W14 Section 01 Slide Set 14 slide 15/66 Why is biased notation used for exponents in f-p numbers? It turns out that biased notation helps with the design of relatively small, speedy circuits to decide whether one f-p number is less than another f-p number. (We won't study the details of that in ENCM 369.) Also, it's useful that the bit pattern for an actual exponent of zero is not a sequence of zero bits|then a sequence of zero bits can have a different, special meaning. ENCM 369 W14 Section 01 Slide Set 14 slide 16/66 Significand information for a non-zero, normalized f-p number 1 XXX ··· XXX We know this bit Any pattern of 1's and will be a 1. 0's is possible here. There is no need to encode the entire significand. Instead we can record only the bits of the fraction. Leaving out the 1 bit from the left of the binary point allows more precision in the fraction. ENCM 369 W14 Section 01 Slide Set 14 slide 17/66 Outline of Slide Set 14 Introduction to Floating-Point Numbers MIPS Formats for F-P Numbers IEEE Floating-Point Standards MIPS Floating-Point Registers Coprocessor 1 Translating C F-P Code to to MIPS A.L. Quick Overview of F-P Algorithms and Hardware Some Data and Remarks about Speed of Arithmetic ENCM 369 W14 Section 01 Slide Set 14 slide 18/66 MIPS formats for 32-bit and 64-bit f-p numbers bit 31 bits 30{23 bits 22{0 sign bit biased exponent fraction bit 63 bits 62{52 bits 51{0 sign bit biased exponent fraction Exponent bias for 32-bit format: 127ten = 0111_1111two. Exponent bias for 64-bit format: 1023ten = 011_1111_1111two. ENCM 369 W14 Section 01 Slide Set 14 slide 19/66 MIPS formats for 32-bit and 64-bit f-p numbers The 32-bit format is called single precision. The 64-bit format is called double precision. We'll see later that MIPS instruction mnemonics for single-precision operations end in .s, as in mov.s, while the mnemonics for double-precision operations end in .d, as in add.d. ENCM 369 W14 Section 01 Slide Set 14 slide 20/66 Example: How is 9:375ten encoded in 32-bit and 64-bit formats? From previous work: 1 1 9:375 = 9 + + 4 8 = 1001:011two = 1:001011 × twothree (normalized) For each of the 32-bit and 64-bit formats, what are the bit patterns for the biased exponents? What are the complete bit patterns for the f-p numbers? ENCM 369 W14 Section 01 Slide Set 14 slide 21/66 More examples How would −9:375ten be encoded in the 32-bit format? How would 0:125ten be encoded in the 32-bit format? What base ten number does the 32-bit pattern 1_0111_1110_11_[21 zeros] represent? ENCM 369 W14 Section 01 Slide Set 14 slide 22/66 How to represent zero in f-p formats A special rule says that if all exponent and fraction bits are zero, the number being represented is 0.0. So, what are the representations of 0.0 in 32-bit and 64-bit formats? ENCM 369 W14 Section 01 Slide Set 14 slide 23/66 Outline of Slide Set 14 Introduction to Floating-Point Numbers MIPS Formats for F-P Numbers IEEE Floating-Point Standards MIPS Floating-Point Registers Coprocessor 1 Translating C F-P Code to to MIPS A.L. Quick Overview of F-P Algorithms and Hardware Some Data and Remarks about Speed of Arithmetic ENCM 369 W14 Section 01 Slide Set 14 slide 24/66 IEEE standards for floating-point numbers and arithmetic (1) IEEE: Institute of Electrical and Electronics Engineers \IEEE 754" and \IEEE floating-point" are informal names for both the original IEEE 754-1985 standard and the revised IEEE 754-2008 standard.