Int. J. Nanosci. Nanotechnol., Vol. 10, No. 2, June 2014, pp. 117-126 Novel Design of n-bit Controllable Inverter by Quantum-dot Cellular Automata M. Kianpour1, R. Sabbaghi-Nadooshan2 1- Electrical Engineering Department, Islamic Azad University, Science and Research Branch, Tehran, I. R. Iran 2- Electrical Engineering Department, Islamic Azad University, Central Tehran Branch, Tehran, I. R. Iran (*) Corresponding author: [email protected] (Received: 22 Jan. 2014 and accepted: 09 Feb. 2014) Abstract: Application of quantum-dot is a promising technology for implementing digital systems at nano-scale. Quantum-dot Cellular Automata (QCA) is a system with low power consumption and a potentially high density and regularity. Also, QCA supports the new devices with nanotechnology architecture. This technique works based on electron interactions inside quantum-dots leading to emergence of quantum features and decreasing the problem of future integrated circuits in terms of size. In this paper, we will successfully design, implement and simulate a new 2-input and 3-input XOR gate (exclusive OR gate) based on QCA with the minimum delay, area and complexities. Then, we will use XOR gates presented in this paper, in 2-bit, 4-bit and 8-bit controllable inverter in QCA. Being potentially pipeline, the QCA technology calculates with the maximum operating speed. We can use this controllable inverter in the n-bit adder/subtractor and reversible gate. Keywords: Exclusive OR(XOR) gate, Inverter, Majority gate, Quantum-dot Cellular Automata(QCA). 1. INTRODUCTION was developed in 1997 [2]. It is expected that QCA plays an important role in nanotechnology research. Quantum-dot Cellular Automata (QCA) is a Due to significant features of QCA, high density, low promising model emerging in nanotechnology. In power consumption, very high processing potential QCA, binary data appear as loading quantum-dots and being pipeline, it has become an interesting within the cells. XOR gates are important circuits in alternative for CMOS technology. Using molecular QCA technique because they are expected to be used QCAs we can have a density higher than 100 devices in adder and reversible gate at nano-scale. QCA is a (~3×1011 – 18nm cells) per cm2 and a performance known technology that can be a good replacement faster than 2.5 THz. Theoretically, processing speed for CMOS-based devices in nano-scale. may reach 25 THz [1]. After decades of its final growth the minimum feature In this paper we concentrate on designing, in CMOS technology, is ultimately confronted with implementing and analyzing a basic device in QCA limitations. In QCA, binary data appear as loading and use it in one of the most fundamental circuits quantum-dots within the cells. Numerous studies are in QCA. Designing method in QCA is different reported in which QCA is able to produce devices from the CMOS so that we will use quantum cells with high density, low power consumption and very in QCA as transistor in CMOS technology. In this high switching speed. paper, we will present new design of 2-input and QCA was first proposed by Lent et.al in 1993 [1], and 3-input XOR gate with minimum number of cells 117 and delay and complexity. This 2-input XOR gate is simulation of the QCADesigner bistable engine. used in designing a controllable inverter, and finally Furthermore, we have used 2DDwave clocking using this 3-input XOR gate, we can design a double method [5] that led to decreased delay and increased controllable inverter. operating speed in circuit. This controllable inverter We follow two objectives in our designs: 1. circuit is applicable in the n-bit adder/subtractor and Implementation with the minimum complexity and reversible gate [6-7]. number of cells; 2. Simplification of connections This paper is organized as follows: section 2 reviews and decreasing delays and consequently increasing the QCA. In section 3, the design and architecture of processing speed. Designing a 2-bit controllable 2-input and 3-input XOR gate in QCA are shown. inverter is the less studied new technology. It can 2, 4 and 8-bit controllable inverter implementation also be generalized to 4, 8 and higher bits. Most of in QCA are also presented in section 4. In section 5, previous studies have been conducted on XOR gate. simulation results are shown. Finally, we conclude Several QCA-based XOR designs have been the paper in the last section. proposed in [3, 4]. Tougaw et al. [3] present the design of basics quantum-dot 2. QCA REVIEW cellular automata (QCA) XOR gate. Mustafa et al. [4] present novel design of quantum-dot cellular 2.1. Background automata (QCA) XOR gate. Each of the XOR gate [3, 4], has an inordinate latency and very complex The main units of QCA are QCA cells located on circuit. the vertices of a square by four quantum-dots. There The noise coupling problem is solved by arranging are two electrons in each cell which can be located, the QCA cells and assigning the clocking zones according to Coulomb electrostatic interaction, in in such a way, that unwanted signal coupling is diagonal position. The electrons are controlled by diminished, resulting in implementation requiring potential barriers and can move by tunneling and only one layer of QCA cells (including all the logic controlling the potential barriers and produce our and interconnection). binary values. Robust operation is achieved with very high It is assumed that tunneling to outside the cells is clock frequencies, verified by the time-dependent impossible due to large potential barriers. Binary Figure 1: Basic QCA logic devices (a) QCA cell, (b) Majority voter (MV), (c) Inverter, (d) Binary wire 118 Kianpour and Sabbaghi-Nadooshan Figure 2: Four phases of the QCA clock, (b) Clock zones signal. data can be encoded in two possible polarizations This wire is of two types: 45 and 90 degrees, which (1,-1) so that 0, 1 will respectively produce our are applicable in cross over [8-10]. binaries in QCA, as observed in Figure 1(a). If two cells are located beside each other, the Coulomb 2.2. QCA clocking interaction between the electrons causes the cells All proposed circuits in QCA not only need a clock to have equal polarization and an equal amount of to synchronize and control information flow but their left side cell. The most fundamental logical also this clock provides the necessary power to gate in QCA is majority gate. A logical equation for run the circuit. QCA calculations by tunneling are a majority gate is: performed by four phases of clock signal, as you F(A,B,C)=AB+AC+BC observe in Figure 2. Clocking in QCA includes four It is implemented by five QCA cells as shown in phases: hold, release, relax and switch. Each phase Figure 1(b). If we keep the polarization of one of is 90 degrees behind the other. the majority gate inputs constant on 1 or 0, we will During switch phase, the potential barriers among obtain OR and AND gates, respectively. Another quantum dots raise gradually and QCA cell will high-consumption and important gate in QCA be located in one of the existing polarization states is NOT or inverter gate. Two common and new with regard to the adjacent cell. During hold phase, examples of such gates are presented in Figure 1(c). the barriers between quantum-dots remain at their Having AND, OR and NOT gates, we are able to higher levels preventing tunneling of electrons, and design and implement the most complex logical polarization of QCA cells will remain the same. circuits. In Figure 1(d) a number of QCA cells are During release and relax phases, the barriers located next to each other creating a wire in QCA. between quantum-dots reduce to its minimum value Figure 3: QCADesigner cells: (a) normal cell, (b) rotate cell, (c) vertical cell, (d) cross over cell, and (e) fix polarization cell. International Journal of Nanoscience and Nanotechnology 119 in relax phase and the electrons will be able to move following function: if two input lines have the within the cell. The clock signal can be produced by same amounts, the output value becomes “0” and an inducer electric field and is embedded under the if two input lines have different values, the output lower surface of QCA by CMOS wires [5, 11-12]. equals to “1”. Therefore, this gate has diverse and QCADesigner is a tool generally used for simulating extensive functions in different circuits. Figure 4(a) the QCA circuits. A QCA model might be of single exhibits logic implementation of 2-input XOR gate layer or multi layer. In a single layer design, only and Figure 4(b) exhibits the proposed 2-input XOR normal cells, rotate cells and fix polarization cells gate implementation in QCA technique. are used. These findings are depicted in Figure 3(a), 3(b) and 3(e). When a QCA signal moves from one layer to another, it goes via vertical cells (Figure 3(c)).Then, in the upper layer, it propagates through cross over cells (Figure 3(d)). Finally, it can go down to the main layer via vertical cells [13]. Figure 4: 2-input XOR gate implemented by (a) 3. ARCHITECTURE OF PROPOSED logical gate, (b) QCA with majority gate. 2-INPUT AND 3-INPUT XOR GATE IN QCA This gate bears the logic equation of In this article, we have designed a hierarchical F(AF(A,B)=A, B) = A ⊕B=A’B+AB’B = A'B + AB ' circuit. First, we designed a 2-input XOR and then the 3-input XOR. With a series connection of this The circuit was designed and simulated for XOR we produced the inverter of the n-bit digits functional behavior using the QCADesigner Ver.