Analysis and Design of Wideband LC VCOs Axel Dominique Berny Robert G. Meyer Ali Niknejad Electrical Engineering and Computer Sciences University of California at Berkeley Technical Report No. UCB/EECS-2006-50 http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-50.html May 12, 2006 Copyright © 2006, by the author(s). All rights reserved. Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission. Analysis and Design of Wideband LC VCOs by Axel Dominique Berny B.S. (University of Michigan, Ann Arbor) 2000 M.S. (University of California, Berkeley) 2002 A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Electrical Engineering and Computer Sciences in the GRADUATE DIVISION of the UNIVERSITY OF CALIFORNIA, BERKELEY Committee in charge: Professor Robert G. Meyer, Co-chair Professor Ali M. Niknejad, Co-chair Professor Philip B. Stark Spring 2006 Analysis and Design of Wideband LC VCOs Copyright 2006 by Axel Dominique Berny 1 Abstract Analysis and Design of Wideband LC VCOs by Axel Dominique Berny Doctor of Philosophy in Electrical Engineering and Computer Sciences University of California, Berkeley Professor Robert G. Meyer, Co-chair Professor Ali M. Niknejad, Co-chair The growing demand for higher data transfer rates and lower power consumption has had a major impact on the design of RF communication systems. In both wireless and wireline applications, this has been achieved using more spectrally efficient modulations and/or wider channel bandwidth in combination with engineering techniques to lower power and fabrication costs. Furthermore, as communication standards evolve and new applications are created, systems not only have to cope with a more crowded spectrum, they must also support a larger number of legacy standards for reasons of backward compatibility. This has resulted in a trend promoting more wideband and spectrally adaptive devices. One of the most critical components in modern communication devices is the VCO. i To my parents ii Contents List of Figures v List of Tables ix 1 Introduction 1 1.1 Recent Trends in RF Communication Systems ............... 1 1.2 Modern Applications of PLL Frequency Synthesizers ........... 3 1.3 Motivation and Research Objectives ..................... 6 1.4 Thesis Organization .............................. 8 2 PLL Frequency Synthesizer Fundamentals 9 2.1 Basic Operating Characteristics ....................... 9 2.2 Spectral Purity ................................ 10 2.2.1 Phase Noise .............................. 11 2.2.2 Jitter .................................. 18 2.3 PLL Core Building Blocks .......................... 21 2.3.1 Voltage-Controlled Oscillators .................... 21 2.3.2 Frequency Dividers .......................... 22 2.3.3 Phase Detectors ............................ 23 2.3.4 Loop Filters .............................. 28 2.4 PLL Dynamics ................................ 30 2.4.1 Linear model of third-order PLL ................... 31 2.4.2 Transient Response .......................... 35 2.5 Noise in PLLs ................................. 42 2.6 PLL Frequency Synthesizer Architectures .................. 47 2.6.1 Integer-N PLL Synthesizer ...................... 47 2.6.2 Fractional-N PLL Synthesizer .................... 48 2.6.3 Σ∆ Fractional-N PLL Synthesizer .................. 50 2.6.4 Dual-Loop PLL Synthesizer ..................... 54 iii 3 LC VCO Fundamentals 57 3.1 Fundamental Oscillator Characteristics ................... 57 3.2 LC Tanks ................................... 60 3.2.1 Basic RLC networks ......................... 60 3.2.2 Integrated Spiral Inductors ...................... 63 3.2.3 Integrated Capacitors ......................... 71 3.2.4 Integrated Varactors ......................... 72 3.3 Start-up Considerations ........................... 75 3.4 Steady-state Characteristics ......................... 77 3.5 Phase Noise in LC Oscillators ........................ 79 3.5.1 First-order LTI Analysis ....................... 79 3.5.2 LPVT Analysis ............................ 82 3.6 Integrated LC VCO topologies ....................... 85 3.6.1 Device Parasitics ........................... 87 3.6.2 Output Voltage Amplitude ...................... 89 3.6.2.1 Current-Limited and Voltage-Limited Regimes ...... 89 3.6.2.2 Analysis of RF VCO Amplitude .............. 94 3.7 Phase Noise Performance ........................... 111 3.8 Summary ................................... 112 4 Analysis and Design of Wideband LC VCOs 115 4.1 Introduction .................................. 115 4.2 Design Considerations for Wideband LC VCOs .............. 116 4.2.1 Frequency Dependence of Start-up Constraints ........... 116 4.2.2 Frequency Dependence of LC Tank Amplitude ........... 119 4.3 Amplitude Control .............................. 125 4.3.1 Conventional Continuous-time Amplitude Control ......... 125 4.3.2 Proposed Digital Amplitude Control ................ 126 4.4 Tuning Range Analysis ............................ 128 5 A Wideband LC VCO Prototype 135 5.1 Introduction .................................. 135 5.2 A wideband LC VCO Prototype ...................... 136 5.2.1 VCO Design .............................. 136 5.2.2 VCO Output Buffer ......................... 144 5.2.3 Amplitude Calibration Circuits ................... 146 5.3 Experimental Results ............................. 150 5.4 Summary ................................... 159 6 Conclusion 160 6.1 Thesis Summary ............................... 160 6.2 Future Research Opportunities ........................ 162 iv A LC VCO frequency sub-bands 163 A.1 Adjacent sub-band overlap condition .................... 163 A.2 Adjacent sub-band frequency overlap factor ................ 164 B Sub-threshold MOS peak detector Analysis 166 Bibliography 170 v List of Figures 1.1 Chip-to-chip serial receiver using a CDR unit. ............... 4 1.2 Two common applications of PLLs: (a) a cable TV tuner based on a dual-conversion architecture, (b) a wireless receiver based on a direct- conversion architecture. ............................ 5 2.1 Block diagram of a basic PLL. ........................ 10 2.2 (a) Rn(τ) and (b) Pn(f) of the thermal noise from a generic RC lowpass filter. ...................................... 13 2.3 Typical measured plot of SSB free-running oscillator phase noise. .... 14 2.4 SNR degradation due to reciprocal mixing of unwanted signal. ...... 16 2.5 QPSK symbol constellation showing rotational error due to finite phase noise φ(t) on the LO. ............................. 17 2.6 Time waveform showing jitter with statistics underneath. ......... 19 2.7 log(σ∆T ) vs. log(∆t). ............................. 19 2.8 Generic LC VCO. ............................... 22 2.9 Programmable Frequency Divider. ...................... 23 2.10 Tri-state phase-frequency detector (PFD). ................. 24 2.11 (a) Tri-state PFD transition state diagram and (b) signal waveforms. .. 25 2.12 Simplified schematic of a charge-pump driven by a PFD and loaded by an arbitrary loop filter. ............................ 26 2.13 Ideal PFD-CP phase to average current transfer characteristic. ...... 27 2.14 (a) second-order passive loop filter. (b) second-order active loop filter. .. 30 2.15 Linear model of third-order PLL. ...................... 32 2.16 20 log10(|T (s)|) and ∠T (s) for third-order PLL. The effects of parasitic poles from the finite output resistance of the charge-pump (ωro) and an out-of-band RC filter (ω2) are shown in grey. ................ 33 2.17 Magnitude response of H(s). ......................... 35 2.18 Unit step error response ε(t) vs. ωnt of second-order PLL. ........ 39 2.19 Unit step error response εr(t) vs. ωct of third-order PLL with ζr = (r − 1)/2, where r = ωc/ωz = ω1/ωc. .................... 40 vi 2.20 Timing diagram of REF and DIV (inputs to the PFD) and Iout (charge- pump output current) during cycle-slip, where ωc is assumed to be infi- nitely large. .................................. 41 2.21 Typical locking response with and without cycle-slipping. ......... 43 2.22 PLL linear noise model (a), and equivalent model with input- and output- referred noise sources (b). ........................... 44 2.23 Typical PLL noise. .............................. 46 2.24 Basic Fractional-N PLL showing digital k–bit accumulator. ........ 51 2.25 Phase error in Fractional-N PLL. ...................... 51 2.26 Fractional-N PLL with phase error compensation. ............. 52 2.27 Σ∆ Fractional-N PLL Synthesizer. ..................... 54 2.28 Example of a dual-loop PLL. ......................... 56 3.1 (a) Feedback model. (b) Negative-resistance model. ............ 58 3.2 (a) Parallel LC tank. (b) Series LC tank. ................. 60 3.3 Magnitude and phase of LC tank impedance for Parallel (a) and Series (b) configurations. ............................... 62 3.4 Typical integrated inductors: (a) square, (b) octagonal, and (c) circular spirals. ..................................... 65 3.5 A pair of single-ended inductors (a) and a differential inductor (b) with similar total inductance. ........................... 65 3.6 Q and L vs. f of 3nH inductor for different widths (w), and n =3, s = 4.5µm. ..................................