Onfi Overview

Onfi Overview

An Update Jim Cooke NAND Marketing Micron Technology, Inc. Thursday, August 6, 2009 Outline . ONFi Overview . ONFi Provides Speed Enhancements . The Path to Higher Performance Santa Clara, CA USA August 2009 2 Thursday, August 6, 2009 Why ONFi ? . NAND was the only commodity memory with no standard interface . The Open NAND Flash Interface (ONFi) Workgroup was formed in May 2006 to drive standardization for the raw NAND Flash interface . ONFi has been busy… Santa Clara, CA USA August 2009 3 Thursday, August 6, 2009 Why ONFi ? . NAND was the only commodity memory with no standard interface . The Open NAND Flash Interface (ONFi) Workgroup was formed in May 2006 to drive standardization for the raw NAND Flash interface . ONFi has been busy… ONFi 1.0 (Dec ’06) Defined a standard electrical and protocol interface for NAND, including the base command set. Santa Clara, CA USA August 2009 3 Thursday, August 6, 2009 Why ONFi ? . NAND was the only commodity memory with no standard interface . The Open NAND Flash Interface (ONFi) Workgroup was formed in May 2006 to drive standardization for the raw NAND Flash interface . ONFi has been busy… ONFi 1.0 (Dec ’06) (Jul ’07) DefinedBlock a standard Abstracted electrical and protocol NAND interface for NAND,1.0 includingDefined the a managed base command NAND set.solution that utilizes the raw NAND interface. Santa Clara, CA USA August 2009 3 Thursday, August 6, 2009 Why ONFi ? . NAND was the only commodity memory with no standard interface . The Open NAND Flash Interface (ONFi) Workgroup was formed in May 2006 to drive standardization for the raw NAND Flash interface . ONFi has been busy… ONFi 1.0 (Dec ’06) Block Abstracted NAND 1.0 (Jul ’07) Defined a standard electrical and protocol interface for NAND,(Feb ’08) includingDefinedONFi the a managed base 2.0 command NAND set.solution that utilizes the raw NAND interface.Defined a high speed DDR interface, tripling the traditional NAND bus speed from 40 MB/s to 133 MB/s. Santa Clara, CA USA August 2009 3 Thursday, August 6, 2009 Why ONFi ? . NAND was the only commodity memory with no standard interface . The Open NAND Flash Interface (ONFi) Workgroup was formed in May 2006 to drive standardization for the raw NAND Flash interface . ONFi has been busy… ONFi 1.0 (Dec ’06) Block Abstracted NAND 1.0 (Jul ’07) Defined a standard electrical and protocol interface for NAND,(Feb ’08) includingDefinedONFi the a managed base 2.0 command NAND set.solution that utilizes the raw NAND interface.DefinedNAND a high speed Connector DDR interface, tripling 1.0 the traditional NAND(Apr ’08) bus Definedspeed from a connector 40 MB/s andto 133 NAND MB/s. module that is the equivalent of a NAND DIMM. Santa Clara, CA USA August 2009 3 Thursday, August 6, 2009 Why ONFi ? . NAND was the only commodity memory with no standard interface . The Open NAND Flash Interface (ONFi) Workgroup was formed in May 2006 to drive standardization for the raw NAND Flash interface . ONFi has been busy… ONFi 1.0 (Dec ’06) Block Abstracted NAND 1.0 (Jul ’07) Defined a standard electrical and protocol interface for NAND,(Feb ’08) includingDefinedONFi the a managed base 2.0 command NAND set.solution that utilizes the raw NAND interface.NAND Connector 1.0 (Apr ’08) DefinedONFi a high speed 2.1 DDR interface, tripling the traditional NAND(Jan ‘09) bus Definedspeed from a connector 40 MB/s andto 133 NAND MB/s. module that is the equivalent of a NANDIncluded DIMM. additional features and support for NAND bus speeds up to 200 MB/s. Santa Clara, CA USA August 2009 3 Thursday, August 6, 2009 Why ONFi ? . NAND was the only commodity memory with no standard interface . The Open NAND Flash Interface (ONFi) Workgroup was formed in May 2006 to drive standardization for the raw NAND Flash interface . ONFi has been busy… ONFi 1.0 (Dec ’06) Block Abstracted NAND 1.0 (Jul ’07) Defined a standard electrical and protocol interface for NAND,(Feb ’08) includingDefinedONFi the a managed base 2.0 command NAND set.solution that utilizes the raw NAND interface.NAND Connector 1.0 (Apr ’08) DefinedONFi a high speed 2.1 DDR interface, tripling the traditional NAND(Jan ‘09) bus Definedspeed from a connector 40 MB/s andto 133 NAND MB/s. module that is the equivalent of a NANDIncluded DIMM. additional features and support for NAND bus speeds up to 200 MB/s. ONFi is a single-purpose workgroup, facilitating focused efforts and achieving significant results in a timely manner. Santa Clara, CA USA August 2009 3 Thursday, August 6, 2009 A-Data Afa Technologies Alcor Micro Aleph One Anobit Tech. Apacer Arasan Chip Systems ASMedia Technology ATI Avid Electronics BitMicro Biwin Technology Chipsbank Cypress DataFab Systems Data I/O Datalight Denali Software ENE Technology Entorian FCI FormFactor Foxconn Fresco Logic Fusion Media Tech Genesys Logic Hagiwara Sys-Com HiperSem Hitachi GST Hyperstone InCOMM Indilinx Inphi Intelliprop ITE MembersTech Jinvani Systech Kingston Technology Lauron Technologies Lotes LSI Macronix Marvell Mentor Graphics Metaram Moai Electronics Molex NVidia Orient Semiconductor P.A. Semi Powerchip Semi. Power Quotient International Prolific Technology Qimonda Sandforce Seagate Shenzhen Netcom Sigmatel Silicon Integrated Systems Silicon Motion Silicon Storage Tech Silicon Systems STEC Skymedi Smart Modular Tech. Solid State System Super Talent Electronics Synopsys Tandon Tanisys Telechips Teradyne, Inc. Testmetrix Transcend Information Tyco UCA Technology University of York Virident Systems WinBond Santa Clara, CA USA August 2009 4 *Other names and brands may be claimed as the property of others Thursday, August 6, 2009 Continued Innovation: ONFi 2.1 . ONFi 2.1 was ratified in January 2009 and contains a plethora of new features . New capabilities include: • 166 MB/s and 200 MB/s speeds • Power management features • Enhanced ECC information • New commands for increased performance and functionality – Small data move – Change row address ONFI 2.0 tripled the legacy NAND interface speed. ONFI 2.1 delivers a 5X speed boost over legacy NAND! Santa Clara, CA USA August 2009 5 Thursday, August 6, 2009 Adding Speed to Block Abstracted NAND . Block Abstracted NAND is a managed solution, using the existing NAND bus . BA NAND revision 1.1 adds the high-speed interface capabilities of ONFi 2.1 to this solution • Enables 200 MB/s performance, per 8-bit NAND channel . BA NAND revision 1.1 ratified in July Host 5X speed Block 5X speed ONFI ONFI increase Abstracted increase NAND Controller Controller (4-bit ECC) (No ECC req’d) (8-bit ECC) Santa Clara, CA USA August 2009 6 Thursday, August 6, 2009 JEDEC and ONFi Are Collaborating . JEDEC and ONFi are collaborating to increase the global reach of NAND standardization . Any JEDEC member may participate in the ONFi-JEDEC Joint Taskgroup • The ONFi 2.1 specification has been contributed to the joint work Santa Clara, CA USA August 2009 7 Thursday, August 6, 2009 Outline . ONFi Overview . ONFi Provides Speed Enhancements . The Path to Higher Performance Santa Clara, CA USA August 2009 8 Thursday, August 6, 2009 Problem: Latency Increases as Lithography Shrinks 300.0 . NAND component performance is determined by two elements: • NAND array access time 225.0 • Data transfer across the bus . For legacy reads, performance 150.0 is artificially limited to 40 MB/s Microseconds . As NAND page sizes increase, 75.0 latency becomes large • Especially for small reads 0 2KB Page, Legacy4KB Page, Legacy8KB Page, Legacy Data Xfer Santa Clara, CA USA Array Time August 2009 9 Thursday, August 6, 2009 Solution: Continually Scale the NAND Bus 300 . The ONFI source synchronous interface delivers 200 MB/s in performance 225 . Reads balanced between array and data transfer • Pipelined reads enable NAND 150 Ongoing array times to be “hidden” work Microseconds • 200 MB/s is excellent fit for 8KB NAND pages 75 . What about the future? • For 16KB NAND pages, we 0 need to continue scaling… 4KB Page, Legacy8KB Page, Legacy4KB Page, ONFI 2.18KB Page, ONFI 2.116KB Page, ONFI 3.0 . ONFI 3.0: Target is 400 MB/s ONFI providesArray Time the high-speedData Xfer interface needed for SSD and cache designs. Work to reach 400 MB/s is underway. Santa Clara, CA USA August 2009 10 Thursday, August 6, 2009 High-Speed ONFi in Action Photo and information courtesy Intel Corp. ONFI 2.0 NAND Module NAND Controller Santa Clara, CA USA August 2009 11 Thursday, August 6, 2009 High-Speed ONFi in Action Photo and information courtesy Intel Corp. Excellent Data Eyes ONFI 2.0 NAND Module 4-PKG Module: MC Driving NAND Controller 4-PKG Module: NAND Driving Santa Clara, CA USA August 2009 11 Thursday, August 6, 2009 High-Speed ONFi in Action Photo and information courtesy Intel Corp. Excellent Data Eyes ONFI 2.0 NAND Module 4-PKG Module: MC Driving NAND Controller 4-PKG Module: NAND Driving Santa Clara, CA USA Successful operation utilizing the August 2009 ONFi NAND module is achieved at 166 MT/s. 11 Thursday, August 6, 2009 ONFi 2.1: The Speed You Need . ONFi defines speeds ranging from 20 MB/s to 200 MB/s, to allow applications to balance performance and power . The new speeds defined in ONFi 2.1 are 166 MB/s (mode 4) and 200 MB/s (mode 5) Santa Clara, CA USA August 2009 12 Thursday, August 6, 2009 High-Density Scalability . By providing multiple output drive strength settings, many NAND devices can share the I/O bus while maintaining I/ O throughput . DDR200 shown below Simulation results courtesy of Micron Technology Santa Clara, CA USA August 2009 13 Thursday, August 6, 2009 Micron 34nm SLC NAND Sustained Bandwidth 200MB/s ONFi 2.1 sync supports transfers up to 200 MB/s Traditional asynchronous interface is limited to less than 40 MB/s Santa Clara, CA USA August 2009 14 Thursday, August 6, 2009 Micron 34nm MLC NAND Sustained Bandwidth 200MB/s ONFi 2.1 sync supports transfers up to 200 MB/s Traditional asynchronous interface is limited to less than 40 MB/s Santa Clara, CA USA August 2009 15 Thursday, August 6, 2009 Saving Power Wherever Possible .

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