<p> INTERNATIONAL ISLAMIC UNIVERSITY MALAYSIA END OF SEMESTER EXAMINATION SEMESTER 1, 2013/2014 SESSION KULLIYYAH OF ENGINEERING</p><p>Programme : ENGINEERING Level of Study : UG 1</p><p>Time : 9:00 am- 12:00 pm Date : 31/12/13</p><p>Duration : 3 Hours </p><p>Course Code : ECE 1312/ECE 1231 Section(s) : 1 - 8 </p><p>Course Title : Electronics </p><p>This Question Paper Consists of Eight (8) Printed Pages (Including Cover Page) With Five (5) Questions. </p><p>INSTRUCTION(S) TO CANDIDATES DO NOT OPEN UNTIL YOU ARE ASKED TO DO SO</p><p> Total mark of this examination is 100.  This examination is worth 45% of the total assessment.  Answer ALL FIVE questions.</p><p>Any form of cheating or attempt to cheat is a serious offence which may lead to dismissal.</p><p>Q.1 [20 marks]</p><p>1 Electronics ECE 1312 / ECE 1231</p><p>(a) A full wave rectifier circuit is shown in Fig. 1(a) with the primary voltage, v1 = 220</p><p>V(rms) and turns ratio, N1:N2 = 20:1. Assume each diode cut-in voltage, V = 0.65 V. (5+2 marks)</p><p>(i) What is the peak value of the output current if R = 1 k ?</p><p>(ii) What is the Peak Inverse Voltage (PIV) rating of each diode?</p><p>Fig. 1(a)</p><p>(b) Fig. 1(b) shows a multiple diode circuit. If each diode cut-in voltage,</p><p>V = 0.65 V, determine the diode current, ID1 and the output voltage. (7 marks)</p><p>Fig. 1(b)</p><p>2 Electronics ECE 1312 / ECE 1231</p><p>(c) The clamper circuit is shown in Fig. 1(c) has an input sinusoidal voltage, </p><p>V(rms). Sketch the output voltage, against time, t. Assume that diode cut-in voltage, V = 0.65 V. (6 marks)</p><p>Fig. 1(c)</p><p>3 Electronics ECE 1312 / ECE 1231</p><p>Q.2 [20 marks]</p><p>(a) The voltage transfer characteristic and its BJT circuit are shown in Fig. 3(a). Assume</p><p> that VBE (on) = 0.7 V, VCE(sat) = 0.2 V and β = 120.</p><p>(i) Find the value of the resistor, RB by assuming VI = 1.9 V. (5 marks) (ii) Sketch the output load line for the circuit. (5 marks)</p><p>RB</p><p>Fig. 3(a)</p><p>(b) Consider the circuit as shown in Fig. 2(b). Determine IBQ, ICQ and VCEQ for β =100. Sketch the output load line and Q-point by assuming, . (6+4 marks)</p><p>Fig. 2(b)</p><p>4 Electronics ECE 1312 / ECE 1231</p><p>Q.3 [20 marks]</p><p>(a) A common-emitter amplifier has output voltage -2.4 V when its input voltage is 250 mV. The collector resistance of the amplifier 1.5kΩ is changed to 2.5kΩ, what is the new gain</p><p> of the amplifier? Consider that ro = ∞. (4 marks) (b) Draw the small-signal equivalent circuit and calculate the voltage gain of the circuit is shown in Fig. 3. (b). Assume that the transistor and circuit parameters: </p><p>β = 100, VCC = 12 V, VBE(on) = 0.7 V, RC = 6 kΩ, RB = 50 kΩ, VBB = 12 V and</p><p>VT = 0.026 V. (8 marks)</p><p>Fig. 3(b)</p><p>(c) Draw the small-signal equivalent circuit for the common collector amplifier as shown in</p><p>Fig. 3(c). Derive the equation for voltage gain of the circuit. (8 marks)</p><p>Fig. 3(c)</p><p>5 Electronics ECE 1312 / ECE 1231</p><p>Q.4 [20 marks]</p><p>(a) State two (2) differences between MOSFET and BJT. (4 marks)</p><p>(b) Fig. 4(b) shows a NMOS circuit with parameters VTN = 0.6 V and 2 Kn = 0.2 mA/V . Determine the values of VGS, VS and VD. (6 marks) </p><p>Fig. 4(b)</p><p>(c) Design an n-channel MOSFET circuit is as shown in Fig. 4(c) has the following 2 specifications: VDD = 5 V, VSS = -5 V, Kn= 0.48 mA/V and VTN = 1.5 V. Assume that, IDQ = 0.6 mA, VDSQ= 3.5 V and the MOSFET is operating in the saturation region. (10 marks)</p><p>6 Electronics ECE 1312 / ECE 1231</p><p>Fig. 4(c)</p><p>Q.5 [20 marks]</p><p>(a) Determine the small-signal voltage gain, input and output resistances of a common-source amplifier as shown in Fig. 5(a). The circuit parameters are, VDD = 4.5V, RD = 4.7 kΩ, R1 = 120 kΩ, R2 = 47 kΩ and RSi = 4 kΩ. Transistor -1 parameters are Kn = 0.6 mA/V2 and λ = 0.025 V (6 marks)</p><p>Fig. 5(a)</p><p>(b) Fig. 5 (b) shows an n-channel MOSFET logic gate. (i) Draw the corresponding truth table of the logic gate. (3 marks) (ii) Identify the function of the circuit (AND/OR/NOR/NAND gate). (1 marks)</p><p>Fig. 5(b)</p><p>7 Electronics ECE 1312 / ECE 1231</p><p>(c) An op-amp inverting amplifier circuit is shown in Fig. 5(c). (5 +5 marks)</p><p>(i) Derive the close-loop voltage gain of the inverting amplifier, Av = - R2/R1. (ii) Determine the values of R1 and R2, if the gain Av = -10, and the current in the feedback resistor is 10 μA when the output voltage is 5.0 V. </p><p>Fig. 5(c)</p><p>8 Electronics ECE 1312 / ECE 1231</p><p>Useful equations for nMOSFET:</p><p>Where, </p><p>Useful equations for BJT:</p><p>Useful equation for pn-junction:</p><p>9</p>