<p>ECE 4480/5480 Computer Architecture and Design http://ece.uccs.edu/wang/ECE4480_sp_16</p><p>Spring 2016</p><p>Instructor : Dr. Charlie Wang email: [email protected] Textbook: Computer Organization and Design by Patterson and Hennessy, Morgan Kaufmann Publishers, Fifth Edition. Class Time : 8:00 – 10:40 AM Thursdays Class Room : EN 105 office : EN 224; email:[email protected] office hours: 10:40 – 11:50 AM Mondays and Wednesdays or by appointment (using email to set up an appointment or send your questions to me by email)</p><p>Course plan Chapter 1: Computer Abstraction and Technology Performance Power Wall Yield Technology for Building Processors and Memory From Uniprocessor to Multiprocessor Chapter 2: Instructions: Language of the Computer Operations and Operands of Computer Hardware MIPS Instruction Set Assembly Language Programs using MIPS instructions Chapter 3: Arithmetic for Computers Addition, Subtraction, Multiplication, Division Floating Point Numbers Chapter 4: The Processor Building a Datapath and Control Pipelined Datapath and Control Data Hazards: Forwarding versus Stalling Control Hazards, Exceptions, Parallelism via Instructions Chapter 5: Large and Fast: Exploiting Memory Hierarchy Cache Basics, Cache Performance, Dependable Memory Hierarchy A Finite State Machine to Control a simple Cache Virtual Machines, Virtual Memory, Cache Coherence, Parallelism and Memory Hierarchy, Redundant Arrays of Inexpensive Disks. Verilog Tutorial: Simulation Combinational Circuits using ModelSim Simulation Sequential Circuits using ModelSim Verilog Models for a simple MIPS processor</p><p>Grading: Homework: (20%) Midterm 1: (20%) Term Project: (20%) (Using Verilog to design a pipelined processor, details will be given in mid of semester) Final exam (40%)</p>