TKT-3541 Soc Platforms Exercise 10 Version 1.3

TKT-3541 Soc Platforms Exercise 10 Version 1.3

<p> Exercise 10 SoC Platforms Version 1.3</p><p>TUT Digital and Computer TKT-3541 SoC Platforms Systems</p><p>Author: Date: </p><p>TODO: Add names and group number TODO: Add date TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>VERSION HISTORY TODO: Add your own version history.</p><p>Version Date Authors Details</p><p>1.0 21.03.2011 Jussi Raasakka Initial Version</p><p>1.2 24.03.2011 Erno Salminen Added some remarks in green</p><p>1.3 28.03.2011 Jussi Raasakka Final released version</p><p>Modified: 28.03.2011 21:39 2/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>TABLE OF CONTENTS</p><p>1. INTRODUCTION...... 5</p><p>1.1 Scope and purpose of this document...... 5</p><p>1.2 Product...... 5</p><p>1.3 Definitions and Abbreviations...... 5</p><p>2. OVERALL VIEW OF THE DESIGN...... 7</p><p>2.1 Description of the Application Area...... 7</p><p>2.2 Hardware Platform...... 7</p><p>2.3 EDA tool Environment...... 7</p><p>3. SOFTWARE...... 8</p><p>3.1 Software Design Principles...... 8</p><p>3.2 Software Architecture...... 8</p><p>3.3 Software Files...... 8</p><p>3.4 Compilation...... 8</p><p>4. SOFTWARE MODULES...... 9</p><p>4.1 Module X...... 9 4.1.1 Introduction...... 9 4.1.2 Function X...... 9</p><p>5. HARDWARE...... 10</p><p>5.1 Hardware architecture...... 10</p><p>5.2 Hardware Files...... 10</p><p>Modified: 28.03.2011 21:39 3/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>5.3 Compilation/synthesis...... 10</p><p>6. IP BLOCKS...... 11</p><p>6.1 Block X...... 11 6.1.1 Block Connections...... 11 6.1.2 Dependencies...... 11</p><p>7. FURTHER DEVELOPMENT...... 12</p><p>8. VGA MODULE...... 13</p><p>9. REFERENCES...... 14</p><p>Modified: 28.03.2011 21:39 4/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>1. INTRODUCTION This chapter introduces the design and explains what is contained in the other chapters.</p><p>1.1 Scope and purpose of this document</p><p>This document describes the software and hardware used in the TKT- 3541 SoC Platforms course 1exercise work in spring 2011. </p><p>TODO: Add brief description what is presented in this document. Sec- tion XX presents…</p><p>TODO: Add any references that might be useful to Section 9 and cite them in text. </p><p>1.2 Product</p><p>The product is a small game application which is being created as an exercise work for the TKT-3541 SoC Platforms course. The purpose of this game is to teach students few basics about SoC design, such as inter-processor communication, operating systems designed for em- bedded applications, and lots more. The designed game will be run- ning on Altera DE2 Development and Education board 2. </p><p>The goal of the game is to press the corresponding pushbutton indicat- ed by the leds on the Altera DE2 Development and Education board. Each correct pressing of the button will increase the user score by one. The game will gradually get harder and harder as the time interval be- tween required button pressing gets shorter. After player has pressed wrong button the game ends and the total score can be seen from the 7-segment display. </p><p>The game is homage to the late Pertti Pasanen (1930-2001), a Finnish film director and producer, comedian, humorist, inventor, TV person- ality, and practitioner of gags 3. </p><p>1.3 Definitions and Abbreviations </p><p>TODO: If you use any definitions or abbreviations (except SI units) add them here in alphabetical order.</p><p>DE2 Development and Education [board version] 2</p><p> eCos</p><p>EDA Electronics design automation</p><p>Modified: 28.03.2011 21:39 5/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>FPGA</p><p>SoC System-on-Chip</p><p>Modified: 28.03.2011 21:39 6/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>2. OVERALL VIEW OF THE DESIGN This chapter describes the overall view of the design and how it works.</p><p>2.1 Description of the Application Area</p><p>Designed game application works in the DE2 evaluation board. It has no additional connections outside of the board, except the program- ming cable.</p><p>2.2 Hardware Platform</p><p>TODO: Describe briefly what the used DE2 board is. Also explain what resources are being used from the board. For example the FPGA type, memories, pushbuttons etc…</p><p>Tip: Use e.g. 0.5-2 pages</p><p>2.3 EDA tool Environment</p><p>TODO: Describe all the programs and their version numbers you are using in your design. These include e.g. the OS running on the Nios II processors. </p><p>Also describe all programs and their version numbers that you are us- ing in the development of the game application.</p><p>Ex. Altera Quartus version 7.1 SP1</p><p>Modified: 28.03.2011 21:39 7/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>3. SOFTWARE This chapter describes the software part of the design.</p><p>3.1 Software Design Principles</p><p>The application is designed to run in top of the eCos operating system. It is written in C and uses two Nios II soft-core processors. One pro- cessor is used to handle the user input (i.e. reading the buttons) and the other is used to provide visible results to the user (i.e. lighting up leds and showing numbers on the 7-segment display). </p><p>Communication between the processors is handled by the HIBI SoC Interconnection network and associated DMA drivers.</p><p>3.2 Software Architecture</p><p>TODO: Describe how the software is divided into tasks and modules and how they communicate between each other. Use figure and textual explanation.</p><p>If you had SW running both on the workstation and embedded system, pay attention that reader understand their differences, and which parts belongs where.</p><p>Add sequence diagram to show how the different tasks and modules interact. Add textual explanation.</p><p>3.3 Software Files</p><p>TODO: Describe the software files that are used in the design.</p><p>Ex. cpu0_main.c Application entry point for CPU0. </p><p>Categorize the files and point out the most complex ones. Give rough approximation of number of code lines.</p><p>3.4 Compilation</p><p>TODO: Describe how software is compiled.</p><p>Modified: 28.03.2011 21:39 8/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>4. SOFTWARE MODULES This chapter describes detailed information about each software mod- ule used in the design. Tip: Use e.g. 0.5-2 pages per module.</p><p>4.1 Module X</p><p>TODO: Add all modules of your design into their respective sub-chap- ters</p><p>4.1.1 Introduction </p><p>TODO: Add short introduction what is the purpose of this module and what is its purpose in the design. If the module requires other modules to perform, mention these dependencies also.</p><p>4.1.2 Function X</p><p>TODO: Add each function of the module here. For each function at least following must be added: names, parameters, return value, and brief description of operation.</p><p>Modified: 28.03.2011 21:39 9/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>5. HARDWARE This chapter describes the hardware part that is synthesized on the FPGA.</p><p>5.1 Hardware architecture</p><p>TODO: Describe briefly the hardware used in the design. </p><p>Add top-level block diagram of the hardware architecture. (Tip: con- sider reusing one from course’s website…). Describe the main parts and explain how to data flows through the system. </p><p>Explain the clocking and reset.</p><p>Explain the I/O.</p><p>5.2 Hardware Files</p><p>TODO: Describe shortly all the hardware files that are used in the de- sign. Document what language they use. Give rough approximation of number of code lines.</p><p>5.3 Compilation/synthesis</p><p>TODO: Describe how HW is compiled and uploaded to FPGA</p><p>Modified: 28.03.2011 21:39 10/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>6. IP BLOCKS This chapter includes detailed information of the IP-blocks used in the design. The IPs are categorized as… (Tip: and explained in that order) (Note: In our case, these are ready made and, hence, the description differs from SW part.)</p><p>6.1 Block X</p><p>TODO: Describe the block X in detail and explain for which purpose the component is added to the system, how it is connected to the rest of the system, and all other relevant information.</p><p>Tip: Use e.g. 0.5-2 pages per IP and cite external sources for further details.</p><p>Point out where this block is in the figure that describes the whole ar- chitecture.</p><p>6.1.1 Block Connections</p><p>TODO: Describe briefly how the IP-block is connected to the rest of the system, not necessarily at bit-level (as this is just exercise work). </p><p>6.1.2 Dependencies</p><p>TODO: If IP-block requires additional IP-blocks in order to work add them here together with brief description why they are needed. Simi- larly, describe which parts and vendor-specific or tied to certain FPGA board.</p><p>Modified: 28.03.2011 21:39 11/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>7. FURTHER DEVELOPMENT TODO: Add some additional thoughts how the design could be im- proved. E.g. Addition of the VGA module to handle the display in- stead of the 7-segment display. Or you could speculate what is needed to port this application in to different environment (FPGA, CPU, OS) etc.)</p><p>Tip: Use <1 page</p><p>Modified: 28.03.2011 21:39 12/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>8. VGA MODULE TODO: The purpose of this chapter is to describe what additional modifications would be needed in the hardware if a 7-segment display would be replaced with a VGA display.</p><p>You can find the information on the VGA controller here:</p><p> ftp://ftp.altera.com/up/pub/University_Program_IP_Cores/VGA.pdf</p><p>Describe the modifications needed both in hardware and software. Add a block diagram showing how the VGA controller connects to the rest of the system.</p><p>Tip: Use e.g. 0.5-2 pages</p><p>Modified: 28.03.2011 21:39 13/14 TKT-3541 SoC Platforms Exercise 10 Version 1.3</p><p>9. REFERENCES TODO: Add references here. The order is either the citation order or alphabetical according to the family name of the first author</p><p>Each entry consists of authors’ names (if known), title, version num- ber, publisher/ a place where the reader can find the reference, date, and cited/total number of pages. References could include for example DE2 reference manual, eCos user manual etc…</p><p>[1] Otto Esko, TKT-3541 SoC Platforms course web page, Department of Computer Systems, Jan 2011, [Online] Available: http://www.tkt.cs.tut.fi/kurssit/3541/, Accessed March 28, 2011</p><p>[2] DE2 Development and Education Board User Manual, Version 1.4, Altera Corporation, 2006, [Online] Available: ftp://ftp.altera.com/up/pub/Webdocs/DE2_UserManual.pdf, Accessed March 28, 2011 </p><p>[3] Wikipedia contributors, Spede Pasanen, Wikipedia - The Free En- cyclopedia. Nov 2010, [Online] Available: http://en.wikipedia.org/wiki/Spede_Pasanen, Accessed March 24, 2011.</p><p>Modified: 28.03.2011 21:39 14/14</p>

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