Instruction set reference Table of contents Instruction set reference ..................................................................................... 1 Instruction table ............................................................................................. 4 Instruction field definitions ............................................................................... 5 ADDZX – Addition zero-extended ...................................................................... 5 ADDSX – Addition, sign-extended ..................................................................... 5 SUBZX – Subtraction, zero-extended operands ................................................... 6 SUBSX – Subtraction, sign-extended operands ................................................... 6 AND – logical “and” ......................................................................................... 7 OR – logical “or” ............................................................................................. 7 XOR – exclusive “or”........................................................................................ 8 MASKCOPY – masked bit field copy ................................................................... 8 MULZX – integer multiplication, unsigned ........................................................... 8 MULSX – integer multiplication, signed .............................................................. 9 DIVZX – integer division, unsigned .................................................................. 10 DIVSX – integer division, signed ..................................................................... 10 FADD – floating point addition ........................................................................ 11 FSUB – floating point subtraction .................................................................... 11 LSL – logical shift left .................................................................................... 11 LSR – logical shift right .................................................................................. 12 CSL – cyclic shift left ..................................................................................... 12 CSR – cyclic shift right ................................................................................... 13 ASR – arithmetic shift right ............................................................................ 13 FIELDSET – set field in the register ................................................................. 14 FIELDGET – get the bit field ........................................................................... 14 FMUL – floating point multiplication ................................................................. 15 FDIV – floating point division. ......................................................................... 15 SQRT – square root ....................................................................................... 15 DAA – decimal adjust after addition ................................................................. 16 DAS – decimal adjust after subtraction ............................................................ 16 NEG –negation .............................................................................................. 17 BSWAP – bit swapping ................................................................................... 17 RND – Round. ............................................................................................... 18 POS – high bit position .................................................................................. 18 FP2INT – floating point to integer .................................................................... 18 INT2FP – integer to floating point conversion .................................................... 19 COPYZX – copy register to register with zero extension ..................................... 19 COPYSX – copy with sign extension ................................................................. 20 LID – load immediate value into data register ................................................... 20 NOT – inversion ............................................................................................ 21 SFR – store flag register ................................................................................ 21 LFR – load flag register .................................................................................. 22 LSLI – logical shift left by immediate shift parameter ......................................... 22 LSRI – logical shift right by immediate shift parameter ...................................... 22 CSLI – cyclic shift left by immediate parameter ................................................. 23 CSRI – cyclic shift right by immediate parameter .............................................. 23 ASRI – arithmetic shift right by immediate parameter ........................................ 24 ST – store data ............................................................................................. 24 LD – load data .............................................................................................. 25 PUSHD – push data register into stack ............................................................. 26 POPD – pop data register from stack ............................................................... 27 PUSHA – push address register ....................................................................... 28 POPA – pop address register from stack ........................................................... 28 LAR – load address register ............................................................................ 29 SAR – store address register .......................................................................... 29 LIA – load immediate offset to the address register ........................................... 29 IAR – increment address register .................................................................... 30 AAR – add value to address register ................................................................ 30 FMULACC – multiplication and accumulation. .................................................... 31 FFT – fast fourier transform ............................................................................ 34 SENDMSG – send message ............................................................................. 35 GETPAR – get message parameter .................................................................. 35 JUMPR – jump by register content ................................................................... 36 CALLR – subroutine call by register content ...................................................... 36 JC – jump conditional if flag set to 1 ................................................................ 37 JNC – jump conditional if flag set to 0 .............................................................. 38 LOOP – loop ................................................................................................. 38 MEMALLOC – memory allocation request .......................................................... 38 RET – return from subroutine ......................................................................... 39 ENDMSG – end of message ............................................................................ 39 JUMPI – jump by immediate displacement ........................................................ 40 CALLI – subroutine call by immediate displacement ........................................... 40 BKPT – breakpoint ......................................................................................... 41 SLEEP – process sleeps .................................................................................. 41 NOP – no operations ...................................................................................... 42 Instruction table F E D C B A 9 8 7 6 5 4 3 2 1 0 F NOP F E E D D MEM SEND SLEEP BKPT CALLI JUMPI ENDMSG RET LOOP JNC JC CALLR JUMPR GETPAR C ALLOC MSG C B B A A 9 FFT FMULACC 9 8 AAR IAR LIA SAR LAR POPA PUSHA POPD PUSHD LD ST 8 7 7 6 6 5 ASRI CSRI CSLI LSRI LSLI 5 4 LFR SFR NOT LID COPYSX COPYZX INT2FP FP2INT POS RND BSWAP NEG DAS DAA 4 3 3 2 2 FIELD FIELD SQRT FDIV FMUL ASR CSR CSL LSR LSL 1 GET SET 1 MASK FSUB FADD DIVSX DIVZX MULSX MULZX XOR OR AND SUBSX SUBZX ADDSX ADDZX 0 COPY 0 F E D C B A 9 8 7 6 5 4 3 2 1 0 Instruction field definitions Mnemonic Description R0,R1,R2…R31 GPR definition without complete reference of the operand size or type. RB0,RB1…RB31 8-bit operand definition. RW0,RW1…RW31 Word-wide operand definition. RD0,RD1…RD31 Double word operand definition. RQ0,RQ1…RQ31 64-bit operand definition. RFS0,RFS1…RFS31 Single precision floating point operand (32 bit). RFD0,RFD1…RFD31 Double precision floating point operand (64 bit). RFE0,RFE1…RFE31 Extended precision floating point operand (128 bit). AR0,AR1…AR15 Address registers. W0,W1,W2…W7 16-bit word position definition for loading him into the GPR or ADR. MAR0,MAR1…MAR7 Address register’s pair description in the memory load/store operations. CF,ZF,SF,OF,IF,NF,DF Arithmetic and logic operations flags. ADDZX – Addition zero-extended Format: 31 28 23 20 15 12 7 0 FORMAT FORMAT FORMAT DST SRC2 SRC1 00 DST SRC2 SRC1 Description. Integer addition with operands extension by zeroed bits. Source operands can have a different size. Both source operands expand up to 64 bit by means of bits with zero state in left. Result’s width is pointed by the Format DST field. Altered flags in AFR[dst]: CF[15:0], ZF, SF, OF Example: ADDZX Rw5,Rw6:Rb23