Universal Asynchronous Receiver Transmitter (UART) HIGHLIGHTS This section of the manual contains the following major topics: 1.0 Introduction ....................................................................................................................... 2 2.0 Control Registers .............................................................................................................. 4 3.0 UART Baud Rate Generator ........................................................................................... 12 4.0 UART Configuration........................................................................................................ 14 5.0 UART Transmitter ........................................................................................................... 15 6.0 Data Bit Detection ...........................................................................................................20 7.0 UART Receiver ............................................................................................................... 21 8.0 Using the UART for 9-Bit Communication ...................................................................... 26 9.0 Other Features of the UART ........................................................................................... 29 10.0 UART Operation with DMA ............................................................................................. 31 11.0 UART Operation During CPU Sleep and Idle Modes ..................................................... 33 12.0 Operation of UxCTS and UxRTS Control Pins ............................................................... 35 13.0 Infrared Support .............................................................................................................. 37 14.0 LIN/J2602 Support .......................................................................................................... 40 15.0 Smart Card Support ........................................................................................................ 42 16.0 Registers Map................................................................................................................. 51 17.0 Related Application Notes............................................................................................... 52 18.0 Revision History .............................................................................................................. 53 2009-2013 Microchip Technology Inc. DS70000582E-page 1 dsPIC33/PIC24 Family Reference Manual Note: This family reference manual section is meant to serve as a complement to device data sheets. Depending on the device variant, this manual section may not apply to all dsPIC33 and PIC24 devices. Please consult the note at the beginning of the “Universal Asynchronous Receiver Transmitter (UART)” chapter in the current device data sheet to check whether this document supports the device you are using. Device data sheets and family reference manual sections are available for download from the Microchip worldwide web site at: http://www.microchip.com This document supersedes the following PIC24 and dsPIC Family Reference Manual sections: DS Number Section Number Title DS39708 21 UART: PIC24F Family Reference Manual DS70232 17 UART: PIC24H Family Reference Manual DS70582 17 UART: dsPIC33E/PIC24E Family Reference Manual DS70066 19, 34 UART: dsPIC30F Family Reference Manual DS70188 17 UART: dsPIC33F/PIC24H Family Reference Manual DS70582 17 UART: dsPIC33E/PIC24E Family Reference Manual 1.0 INTRODUCTION The Universal Asynchronous Receiver Transmitter (UART) module is one of the serial I/O modules available in the dsPIC33 and PIC24 device families. The UART is a full-duplex, asynchronous communication channel that communicates with peripheral devices and personal computers, using protocols such as RS-232, RS-485, LIN/J2602 and IrDA®. The module also supports the hardware flow control option with the UxCTS and UxRTS pins and includes the IrDA encoder and decoder. The primary features of the UART module are as follows: • Full-duplex, 8-bit or 9-bit data transmission through the UxTX and UxRX pins • Even, odd or no parity options (for 8-bit data) • One or two Stop bits • Hardware auto-baud feature • Hardware flow control option with the UxCTS and UxRTS pins (These pins are not available on all devices. Refer to the “Universal Asynchronous Receiver Transmitter (UART)” chapter of the specific device data sheet for availability.) • Fully integrated Baud Rate Generator (BRG) with 16-bit prescaler • Baud rates up to 17.5 Mbps • Four-deep First-In First-Out (FIFO) transmit data buffer • Four-deep FIFO receive data buffer • Parity, framing and buffer overrun error detection • Support for 9-bit mode with address detect (9th bit = 1) • Transmit and receive interrupts • Loopback mode for diagnostic support • IrDA encoder and decoder logic • LIN/J2602 bus support (v1.3 and 2.0) • 16x baud clock output for external IrDA encoder/decoder support • Optional ISO 7816 Smart Card support DS70000582E-page 2 2009-2013 Microchip Technology Inc. UART A simplified block diagram of the UART is illustrated in Figure 1-1. The UART module consists of the following key hardware elements: • Baud Rate Generator • Asynchronous Transmitter • Asynchronous Receiver Figure 1-1: UARTx Simplified Block Diagram Baud Rate Generator ISO 7816 Support IrDA® BCLKx UxRTS Hardware Flow Control UxCTS UARTx Receiver UxRX UARTx Transmitter UxTX 2009-2013 Microchip Technology Inc. DS70000582E-page 3 dsPIC33/PIC24 Family Reference Manual 2.0 CONTROL REGISTERS Note: Each dsPIC33/PIC24 family device variant may have one or more UART modules. An ‘x’ used in the names of pins, control/status bits and registers denotes the par- ticular UART module number. Refer to the “Universal Asynchronous Receiver Transmitter (UART)” chapter of the specific device data sheet for more details. This section outlines the specific functions of each register that controls the operation of the UART module: • UxMODE: UARTx Mode Register - Enables or disables the UART module - Enables or disables the IrDA encoder and decoder - Enables or disables the WAKE, ABAUD bits and Loopback features - Enables or disables the UxRTS and UxCTS pins - Configures the UxRTS pin for the desired mode of operation - Configures the polarity of the UxRX pin - Selects the type of baud rate - Selects the number of data bits, parity and Stop bits • UxSTA: UARTx Status and Control Register - Selects the Transmission Interrupt mode - Selects the Receive Interrupt mode - Enables or disables the UART transmission - Controls the Address Detect mode - Indicates various status conditions, such as transmit and receive buffer state, parity error, framing error and overflow error • UxADMD: UARTx Address Mask Detect Register - Stores address match and mask values • UxRXREG: UARTx Receive Register - Stores the received data • UxTXREG: UARTx Transmit Register (Write-Only) - Provides the data to be transmitted • UxBRG: UARTx Baud Rate Register - Stores the baud rate value of the transmitted or received data DS70000582E-page 4 2009-2013 Microchip Technology Inc. UART Register 2-1: UxMODE: UARTx Mode Register R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 UARTEN(3) — USIDL IREN(1) RTSMD ALTIO(2) UEN1(2) UEN0(2) bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 WAKE(4) LPBACK ABAUD(5) URXINV BRGH PDSEL1 PDSEL0 STSEL bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 UARTEN: UARTx Enable bit(3) 1 = UARTx is enabled; UARTx pins are controlled by UARTx as defined by the UEN<1:0> and UTXEN control bits 0 = UARTx is disabled; UARTx pins are controlled by the corresponding PORTx, LATx and TRISx bits bit 14 Unimplemented: Read as ‘0’ bit 13 USIDL: UARTx Stop in Idle Mode bit 1 = Discontinues operation when the device enters Idle mode 0 = Continues operation in Idle mode bit 12 IREN: IrDA® Encoder and Decoder Enable bit(1) 1 = IrDA encoder and decoder are enabled 0 = IrDA encoder and decoder are disabled bit 11 RTSMD: Mode Selection for UxRTS Pin bit 1 = UxRTS is in Simplex mode 0 = UxRTS is in Flow Control mode bit 10 ALTIO: UARTx Alternate I/O Selection bit(2) 1 = UARTx communicates using UxATX and UxARX I/O pins 0 = UARTx communicates using UxTX and UxRX I/O pins bit 9-8 UEN<1:0>: UARTx Enable bits(2) 11 = UxTX, UxRX and BCLKx pins are enabled and used; UxCTS pin is controlled by port latches 10 = UxTX, UxRX, UxCTS and UxRTS pins are enabled and used 01 = UxTX, UxRX and UxRTS pins are enabled and used; UxCTS pin is controlled by port latches 00 = UxTX and UxRX pins are enabled and used; UxCTS, UxRTS and BCLKx pins are controlled by port latches bit 7 WAKE: Enable Wake-up on Start bit Detect During Sleep Mode bit(4) 1 = Wake-up is enabled 0 = Wake-up is disabled bit 6 LPBACK: UARTx Loopback Mode Select bit 1 = Enables Loopback mode 0 = Loopback mode is disabled Note 1: This feature is only available for Standard Speed mode (BRGH = 0). Refer to the “Universal Asynchronous Receiver Transmitter (UART)” chapter of the specific device data sheet for availability. 2: These features may not be available on all devices. Refer to the “Universal Asynchronous Receiver Transmitter (UART)” chapter of the specific device data sheet for availability. 3: Enable this bit before enabling the UTXEN bit (UxSTA<10>). 4: The UARTx module does not recognize the first character received on a wake. 5: The use of this feature may consume the corresponding