Lecture 26A: Software Environments for Embedded Systems

Lecture 26A: Software Environments for Embedded Systems

Lecture 26a: Software Environments for Embedded Systems Prepared by: Professor Kurt Keutzer Computer Science 252, Spring 2000 With contributions from: Jerry Fiddler, Wind River Systems, Minxi Gao, Xiaoling Xu, UC Berkeley Shiaoje Wang, Princeton 1 Kurt Keutzer SW: Embedded Software Tools application compiler U source Application S code software E R a.out RTOS A S ROM C I C simulator P debugger A U S I RAM C 2 Kurt Keutzer Another View of Microprocessor Architecture Let’s look at current architectural evolution from the standpoint of the software developers …, in particular Jerry Fiddler 3 Kurt Keutzer Fiddler’s Predictions for the Next Ten Years (2010) End of the “Age of the PC” Lots of Exciting Applications Development Will Continue To Be Hard G Even as we and our competitors continue to make incredible efforts Chips - No predictions MEMS / Nano-technology & Sensors Will Impact Us J. Fiddler - WRS 4 Kurt Keutzer Fundamental Principles Computers are, and will be, everywhere The world itself is becoming more intelligent Our infrastructure will have major software content Most of our access to information will be through embedded systems Economics will inexorably drive deployment of embedded systems The Internet is one important factor in this trend Reliability is a critical issue EVERY tech and mfg. business will need to become good at embedded software J. Fiddler - WRS 5 Kurt Keutzer What Will Be Embedded in Ten Years? Everything That is Now Electro-Mechanical Machines (Nano-Machines) Analog Signals Anything that communicates Lots of stuff in our cars Our Bodies G Today - Pacemakers G Soon - De-Fibrillators, Insulin Dispensers G We can all be the $6M Person, for a lot cheaper All sorts of interfaces G Speech, DNI, etc. J. Fiddler - WRS 6 Kurt Keutzer Embedded Microprocessor Evolution > 500k transistors 2+M transistors 5+M transistors 22+M transistors 1 - 0.8 µ 0.8 - 0.5 µ 0.5 - 0.35 µ 0.25 - 0.18 µ 33 mHz 75 - 100 mHz 133 - 167 mHz 500 - 600 mHz 1989 1993 1995 1999 Embedded CPU cores are getting smaller; ~ 2mm2 for up to 400 mHz G Less than 5% of CPU size Higher Performance by: G Faster clock, deeper pipelines, branch prediction, ... Trend is towards higher integration of processors with: G Devices that were on the board now on chip: “system on a chip” G Adding more compute power by add-on DSPs, ... G Much larger L1 / L2 caches on silicon J. Fiddler - WRS 7 Kurt Keutzer Microprocessor Chaos ST 20 J. Fiddler - WRS M32 R/D StrongARM ARM SH-DSP SH 4 MCORE 680x0 680x0 CPU32 CPU32 PowerPC PowerPC 80x86 80x86 MIPS 3k/4k/5k MIPS 3k/4k/5k SPARC SPARC SH 1/2/3 SH 1/2/3 29k 29k 29k 680x0 RAD 6k RAD 6k CPU32 Siemens C16x Siemens C16x 80x86 NEC V8xx NEC V8xx SPARC PARISC PARISC MIPS R3k i960 i960 68000 i960 563xx 563xx 1980 1990 1996 1998 8 Kurt Keutzer A Challenging Environment Expanding Functional Demands J. Fiddler - WRS Of Embedded Applications And keep it small, stupid! Numerous Microprocessor Architectures Derivative Processors Application-Specific CPUs Systems On A Chip 9 Kurt Keutzer New Hardware Challenges Software Development J. Fiddler - WRS More & More Architectures G User-Customizable µprocessors More Power Demands More Software Functionality G Software is not following Moore’s law (yet) System-on-a-chip DSP 10 Kurt Keutzer Embedded Software Crisis Cheaper, more powerful J. Fiddler - WRS Microprocessors Increasing EmbeddedEmbedded More Time-to-market SoftwareSoftware Applications pressure CrisisCrisis J. Fiddler - WRS Bigger, More Complex Applications 11 Kurt Keutzer SW: Embedded Software Tools application compiler U source Application S code software E R a.out RTOS A S ROM C I C simulator P debugger A U S I RAM C 12 Kurt Keutzer Outline on RTOS Introduction VxWorks G General description G System G Supported processors G Details G Kernel G Custom hardware support G Closely coupled multiprocessor support G Loosely coupled multiprocessor support pSOS eCos Conclusion 13 Kurt Keutzer Embedded Development: Generation 0 Development: Sneaker-net Attributes: G No OS G Painful! G Simple software only 14 Kurt Keutzer Embedded Development: Generation 1 Hardware: SBC, minicomputer Development: Native Attributes: G Full-function OS G Non-Scalable G Non-Portable G Turnkey G Very primitive 15 Kurt Keutzer Embedded Development: Generation 2 Hardware: Embedded Development: Cross, serial line Attributes G Kernel G Originally no file sys, I/O, etc. G No development environment G No network G Non-portable, in assembly 16 Kurt Keutzer Embedded Development: Generation 3 Hardware: SBC, embedded Development: Cross, Ethernet G Integrated, text-based, Unix Attributes G Scalable, portable OS G Includes network, file & I/O sys, etc. G Tools on target G Network required G Heavy target required for development G Closed development environment 17 Kurt Keutzer Embedded Development: Generation 4 Hardware: Embedded, SBC Development: Cross G Any tool - Any connection - Any target G Integrated GUI, Unix & PC Attributes G Tools on host G No target resources required G Far More Powerful Tools (WindView, CodeTest, …) G Open dev. environment, published API G Internet is part of dev. environment G Support, updates, manuals, etc. 18 Kurt Keutzer Embedded Development: Generation 5??? Super-scalable Communications-centric Virtual application platform G Java? Multi-media Way-cool development environment G Much easier to create, debug & re-use code G Easy for non-programmers to contribute 19 Kurt Keutzer The RTOS Evolution Application Browser / GUI Java Application Advanced Interconnect X Windows Advanced Networking WindNet Distributed Objects Memory Management Fault Tolerance 90%* Application Multiprocessing 75%* Multiprocessing File System File System File System Application Networking 30%* Networking Networking Kernel 10%* Kernel Kernel Kernel 1980 1990 1996 1998 *Percent of total software supplied by RTOS vendor in a typical embedded device 20 Kurt Keutzer Introduction to RTOS Wind River Systems Inc. VxWorks http://www.wrs.com Integrated Systems Inc. pSOS http://www.isi.com Cygnus Inc. => RedHat eCos http://www.cygnus.com => www.redhat.com 21 Kurt Keutzer VxWorks Real-Time Embedded Applications Graphics Multiprocessing support Internet support Java support POSIX Library File system WindNet Networking Core OS Wind Microkernel VxWorks 5.4 Scalable Run-Time System 22 VxWorks Supported Processors PowerPC SPARC 68K, CPU 32 NEC V8xx ColdFire MCORE M32 R/D 80x86 and Pentium RAD6000 i960 ST 20 ARM and Strong ARM TriCore MIPS SH 23 VxWorks Wind microkernel Task management G multitasking, unlimited number of tasks G preemptive scheduling and round-robin scheduling(static scheduling) G fast, deterministic context switch G 256 priority levels 24 VxWorks Wind microkernel Fast, flexible inter-task communication G binary, counting and mutual exclusion semaphores with priority inheritance G message queue G POSIX pipes, counting semaphores, message queues, signals and scheduling G control sockets G shared memory 25 VxWorks Wind microkernel High scalability Incremental linking and loading of components Fast, efficient interrupt and exception handling Optimized floating-point support Dynamic memory management System clock and timing facilities 26 VxWorks ``Board Support Package’’ BSP = Initializing code for hardware device + device driver for peripherals BSP Developer’s Kit Hardware Processor independent dependent Device dependent code code code BSP 27 VxWorks VxMP A closely coupled multiprocessor support accessory for VxWorks. Capabilities: G Support up to 20 CPUs G Binary and counting semaphores G FIFO message queues G Shared memory pools and partitions G VxMP data structure is located in a shared memory area accessible to all CPUs G Name service (translate symbol name to object ID) G User-configurable shared memory pool size G Support heterogeneous mix of CPU 28 VxWorks VxMP Hardware requirements: G Shared memory G Individual hardware read-write-modify mechanism across the shared memory bus G CPU interrupt capability for best performance G Supported architectures: G 680x0 and 683xx G SPARC G SPARClite G PPC6xx G MIPS G i960 29 VxWorks VxFusion VxWorks accessory for loosely coupled configurations and standard IP networking; An extension of VxWorks message queue, distributed message queue. Features: G Media independent design; App1 App2 G Group multicast/unicast messaging; G Fault tolerant, locale-transparent operations; VxFusion G Heterogeneous environment. Adapter Layer Supported targets: G Motorola: 68K, CPU32, PowerPC Transport G Intel x86, Pentium, Pentium Pro 30 VxWorks pSOS Loader Debug C/C++ File System Memory POSIX I/O system BSPs Management Library pSOS+ Kernel pSOS 2.5 31 pSOS Supported processors PowerPC M32/R 68K m.core ColdFire NEC v8xx MIPS ST20 ARM and Strong ARM SPARClite X86 and Pentium i960 SH 32 pSOS pSOS+ kernel Small Real Time multi-tasking kernel; Preemptive scheduling; Support memory region for different tasks; Mutex semaphores and condition variables (priority ceiling) No interrupt handling is included 33 pSOS Board Support Package BSP = skeleton device driver code + code for low- level system functions each particular devices requires 34 pSOS pSOS+m kernel Tightly coupled or distributed processors; pSOS API + communication and coordination functions; Fully heterogeneous; Connection can be any one of shared memory, serial or parallel links, Ethernet implementations; Dynamic create/modify/delete OS object; Completely device independent 35 pSOS eCos ISO C Library Native Kernel C API µITRON 3.0 API Internal Kernel API Kernel pluggable schedulers, mem alloc, synchronization, timers, interrupts, Device Drivers threads HAL 36 eCos Supported processors Advanced RISC Machines ARM7 Fujitsu SPARClite Matsushita MN10300 Motorola PowerPC Toshiba TX39 Hitachi SH3 NEC VR4300 MB8683x series Intel strong ARM 37 eCos Kernel No definition of task, support multi-thread Interrupt and exception handling Preemptive scheduling: time-slice scheduler, multi-level queue scheduler, bitmap scheduler and priority inheritance scheduling Counters and clocks Mutex, semaphores, condition variable, message box 38 eCos Hardware Abstraction Layer Architecture HAL abstracts basic CPU, including: G interrupt delivery G context switching G CPU startup and etc.

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