© 2017 ROHM Co., Ltd. No. 60AP001E Rev.001 2017.4 Application Note SiC MOSFET Snubber circuit design methods SiC MOSFET is getting more popular in applications where fast and efficient switching is required, such as power supply applications. On the other hand, the fast switching capability causes high dv/dt and di/dt, which couple with stray inductance of package and surrounding circuit, resulting in large surge voltage and/or current between drain and source terminals of the MOSFET. The surge voltage and current have to be controlled to not exceed the maximum rated voltage/current of the device. This application note illustrates a way to design snubber circuit, which is one of the methods to suppress surges voltages and currents. Surge voltage occurring in Drain-Source When a MOSFET turns on, current stores energy in the stray When LS turns off, IMAIN flows through the loop form by LMAIN , inductance of the wire on the PCB layout. The stored energy CDCLINK and parasitic capacitance of HS and LS, as shown by resonates with the parasitic capacitance of the MOSFET, and dotted line. Where CDCLINK is bulk capacitor placed in parallel that produces surge current. Figure 1 illustrates the path of with input HVdc-PGND. During the turn off of LS, surge voltage the ‘ringing current’ in a half bridge topology, which has high occurs in drain-source of LS by resonant phenomenon between side switch (HS) and low side switch (LS). When LS turns on, LMAIN and parasitic capacitance of the MOSFET COSS current IMAIN flows from VSW through the stray inductance LMAIN. （CDS+CDG）. The maximum voltage VDS_SURGE is as shown in (1). Where VHVDC is the applied voltage on HVdc terminal and (*1) ROFF is resistance when the MOSFET turns off. −1 푉 ∗푒−(푎/휔)[tan (푎/휔)+훷] HVdc 푉 = 퐴 ＋푉 (1) DS_SURGE 1+(푎⁄휔)2 HVDC where: HS 2 (High Side) ２ 2 푉A = √푉HVDC + (푎/휔) ∗ (2 ∗ 푅OFF ∗ 퐼MAINｰ푉HVDC) 푉 Φ=푡푎푛−1 HVDC CDCLINK (푎/휔)∗(2∗푅 ∗퐼 −푉 ) Vsw OFF MAIN HVDC IMAIN 1 푎 = 2∗푅OFF∗퐶OSS LS 1 √퐿MAIN/퐶OSS 2 (Low Side) 휔푆푈푅퐺퐸 = ∗ √1 − ( ) √퐿MAIN∗퐶OSS 2푅OFF IMAIN PGND Figure 2 shows surge waveforms when ROHM’s SiC MOSFET (SCT2080KE) turns off with 800V applied on HVdc. According LMAIN PGND to the waveform, VDS_SURGE reaches 961V and ringing frequency is about 33MHz, which brings LMAIN of 110nH. Figure 1 Current path when turn-off surge occurs © 2020 ROHM Co., Ltd. No. 62AN037E Rev.002 1/6 April.2020 Snubber circuit design methods Application Note It would be the best if stray inductance is minimized as much as SCT2080KE VDS=800V, RG_EXT=3.3ohm 1200 60 possible. However it is not always realistic because it might 961V make the heat dissipation condition worse. Instead, placing the 1000 ID 50 VDS snubber capacitor as close as possible to the MOSFET 800 40 minimize the stray inductance of the circuit. The snubber capacitor also absorbs the energy stored in the minimized 600 30 [V] 33MHz [A] connection inductance and clamps surge voltage while the DS D I V 400 20 MOSFET turns off. 200 10 SCT2080KE VDS=800V, RG_EXT=3.3ohm 0 0 1200 60 without C Snubber 1uF C Snubber 961V -200 -10 1000 ID 901V 50 400.55 400.65 400.75 400.85 400.95 VDS Time [us] 800 40 Figure 2. Turn-off waveform with surge 600 30 [V] 44.6MHz [A] DS D I V 400 20 Next step, a snubber capacitor CSNB is introduced, as shown in Figure 3. This capacitor makes LMAIN neglectable. The 200 10 waveform of the surge voltage when LS turns off is shown in 0 0 Figure 4. -200 -10 HVdc 400.55 400.65 400.75 400.85 400.95 Time [us] Figure 4. Reducing turn-off surge by C snubber CSNB CDCLINK Variety and selection of snubber There are two methods of snubber circuits: passive snubber, LSNB which consists of passive components such as resistor, inductor, capacitor and diodes; and active snubber, which utilize semiconductor switch(*1 ） . In this application note, passive PGND snubber is chosen, due to its simplicity and cost effectiveness. Figure 5 shows different snubber examples: (a) C snubber, Figure 3 C Snubber where the capacitor CSNB is connected in parallel to the MOSFET bridge; (b) RC snubber where the resistor RSNB and Surge voltage is reduced by more than 50V (reaching 901V) capacitor CSNB are connected in parallel to each MOSFET; (c) and ringing frequency increases to 44.6MHz. It is because CSNB Discharge RCD snubber, where a diode is added to RC is placed close to the switches and as a result, the stray snubber; and (d) non-discharge RCD snubber, where the inductances (LSNB) involved in the switching path is reduced. In discharging path is changed from the discharge RCD snubber this case, LSNB is about 71nH according to the equation (1). presented in (c). © 2020 ROHM Co., Ltd. No. 62AN037E Rev.002 2/6 April.2020 Snubber circuit design methods Application Note In principle, the snubber has to be placed as close as possible parallel. to the MOSFET in order to maximize its effectiveness. (d) Non-discharge RC snubber: RSNB dissipates only the energy absorbed by CSNB produced during the overvoltage, it means (a) C snubber: it has fewer components but has relatively longer the snubber doesn’t discharge all energy stored in CSNB at every wires. It is more suitable for 2in1 module rather than circuit with switching transient. Thus the energy consumption at RSNB does discrete components. not much increase at high switching frequencies. Therefore a (b) RC snubber: it can be placed close to the MOSFET, large CSNB can be implemented, which realizes a highly however the energy stored in CSNB has to be dissipated by RSNB effective snubber circuit. But it is also to be noted that this during every switching transient of the MOSFET. If the method requires very complicated wire layout which can be switching frequency is high enough, RSNB would dissipate large realized by more than 4 layers PCB. amount of energy (several watts), which limits the size of CSNB. Every snubber circuit has both advantages and And, as results, the suppressing surge capability of the snubber disadvantages, and should be chosen according to circuit is reduced. topology and power. HVdc HVdc CSNB Designing C snubber RSNB CDCLINK CDCLINK C snubber circuit (Figure 6) absorbs energy stored at LMAIN. CSNB CSNB The stray inductance of the snubber path LSNB has to be less R SNB than LMAIN. Larger CSNB makes snubber more effective because PGND PGND energy stored at CSNB is not discharged. Series inductance of the capacitor (ESL), which adds on LSNB, has to be minded (a) (b) because ESL normally increases with the capacitor size. Capacitor should be selected based on electrostatic capacity HVdc HVdc calculated using eq. (2). VDC_SURGE is defined as the maximum C CSNB SNB surge of HVdc. With an assumption that all energy stored at RSNB RSNB CDCLINK CDCLINK LMAIN is transferred to CSNB. R SNB RSNB 2 퐿MAIN∗퐼MAIN C SNB CSNB 퐶SNB > 2 2 (2) 푉DS_SURGE −푉HVDC PGND PGND HVdc (c) (d) Figure 5 Snubber circuits CSNB (a) C snubber, (b) RC snubber, (c) Discharge RCD snubber, (d) Non-discharge RCD snubber CDCLINK Vsw (c) Discharge RCD snubber: RSNB dissipates energy as IMAIN much as in (b) during turn ON, but CSNB surge absorption LSNB capability is more effective than (b) because surge current flows through the diode. The recovery characteristic of the diode must be considered, high di/dt in the snubber circuit can be occurred IMAIN during the switching transient. Therefore, stray inductances PGND LMAIN should be minimized as much as possible to limit over voltages. PGND Figure 6 C snubber It is also the same effect if RSNB is connected with CSNB in © 2020 ROHM Co., Ltd. No. 62AN037E Rev.002 3/6 April.2020 Snubber circuit design methods Application Note Designing RC snubber voltage. Figure 7 shows the current loops when RC snubber works. CSNB 1 휔SNB = ≪ ω (5) is determined by equation (2) and RSNB is obtained from 푅푆푁퐵∗퐶푆푁퐵 SURGE equation (3). Designing discharge RCD snubber −1 푅SNB < (3) Design procedure of discharge RCD snubber is basically the 푓푆푊∗퐶푆푁퐵∗ln[(푉퐷푆_푆푈푅퐺퐸 −푉푆푁퐵)⁄푉퐷푆_푆푈푅퐺퐸] same as RC snubber. Besides resonant frequency is not need to be minded because surge is absorbed by Diode. For diode, a HVdc fast recovery diode type is suitable. LSNB CSNB Designing non-discharge RCD snubber RSNB Non-discharge RCD snubber only consumes energy from the surge voltage, as a result the power dissipation of RSNB is CDCLINK reduced and the selection options for RSNB is wider. Thus, CSNB Vsw IMAIN can be increased, and therefore, the clamping effectiveness. CSNB and RSNB are determined by equation (2) and (3) RSNB respectively. Power consumption of RSNB is determined by CSNB following equation (6) which does not have the second term of LSNB equation (4) including CSNB and fsw. This leads efficient IMAIN clamping capability and makes higher frequency of fsw possible. PGND LMAIN PGND 퐿 ×퐼 2×푓 푃 = 푇푅퐴퐶퐸 푀퐴퐼푁 푠푤 (6) SNB 2 Figure 7 RC snubber HVdc Where: LSNB fSW: Switching frequency, and VSNB: Discharge voltage of snubber (0.9x CSNB VDS_SURGE） RSNB After determining the value of RSNB, the resistor size has to be CDCLINK selected based on the power dissipation calculated by equation Vsw (4). RSNB 2 퐿 ×퐼 2×푓 퐶 ×푉 ×푓 푃 = 푇푅퐴퐶퐸 푀퐴퐼푁 푠푤 + 푆푁퐵 퐻푉퐷퐶 푠푤 (4) SNB 2 2 CSNB LSNB This equation says that, the higher the fSW or VHVDC the higher the power dissipation of RSNB must be.