PYTHON AS A HARDWARE DESCRIPTION LANGUAGE: A CASE STUDY J.I. Villar, J. Juan, M.J. Bellido, J. Viejo, D. Guerrero J. Decaluwe ID2 Group / Department of Electronic Technology Resources #vba University of Seville Leuven, Belgium E.T.S. de Ingenier´ıa Informatica´ email: [email protected] email: jose, jjchico, bellido, julian, guerre @dte.us.es { } ABSTRACT layouts or bitfiles, that can be finally implemented as phys- Many people may see the development of software and hard- ical devices. When used for simulation, HDL compilers (are like different disciplines. However" there are great generate pieces of ”e-ecutable code” that together with a similarities between them that have been shown due to the simulation frame(ork are able to emulate the behaviour appearance of extensions for general purpose programming of the described design so that designers can verify its languages for its use as hardware description languages. In correctness. These pieces of ”e-ecutable code” are the this contribution, the approach proposed by the MyHDL main responsibles for the fact that HDLs can be seen as a package to use Python as an HDL is analyzed #y making special kind of programming language. On the other hand, a comparative study. This study is based on the indepen- synthesys tools take ,D& descriptions to infer structures dent application of 0erilog and Python based 1ows to the that can be implemented in real hardware, thereby generat- development of a real peripheral. The use of MyHD& has re- ing lower-level descriptions so that after a series of steps, vealed to be a powerful and promising tool, not only because a design that can be implemented on a physical device is of the surprising results, #ut also because it opens ne( hori- reached. The fact that not all elements of an ,DL can zons to(ards the development of ne( techniques for model- be extrapolated to hardware, makes HDLs have a greater ing and verification, using the full power of one of the most expressive power for simulation than for synthesis" so it is versatile programming languages no(adays. necessary to define a synthesizable subset clearly stated [2]. In practice, there are t(o main standard HDLs 0,DL 1. INTRODUCTION 5>7 and 0erilog [4]. No(adays their ubiquitous support from manufacturers and the lac+ of final arguments on each other" The design of digital electronic systems, since its inception, make both constitute the #ridge that any design must pass to (as marked by a parallel and steady increase of both the reach the synthesis and implementation technology" regard- complexity of tackled designs and the performance and in- less of which (as its original HDL. This means that any pro- tegration level of implementation technologies. gramming language that (ould have capacity of ,DL, just 4or decades, this fact showed that lo( level design tech- being able to generate 0erilog or VHDL code from its syn- niques (ould not be viable in the long term and therefore thesizable subset could #e abstracted from the lower-level the development and adoption of ne( and efficient method- stages and tools. ologies at a higher abstraction level (ould be required. Moreover" both 0erilog and VHDL simulators imple- These techniques should allo( designers to tackle the ment procedural interfaces 8VPI 5?7 in 0erilog and 0HPI 5A7 increasing complexity of the modeling, testing and imple- in VHDL), through which, external software processes, de- mentation tasks. In response to these needs ne( modeling veloped in any programming language that have the required languages 567 emerged inspired by software programming bindings, could connect to the simulator and govern the be- languages. These languages, called HDLs (hard(are de- havior of some signals according to the observed state. This scription languages), can be seen as programming languages is the fact on which underlies the ability to simulate the be- with special abilities to describe the concurrent nature of the havior of a hardware system using only software routines. digital logic and electronics. HDLs model the structure and They could be implemented in any programming language behaviour of hardware on the dimensions of time and space. and (ould be connected to the simulator through VPI or HDL descriptions are used to generate and specify the VHPI. behaviour and structure of hardware. These specifications Based on the above two points, it seems feasible to trans- have a dual purpose: simulation of the description’s be- form a very high level software programming language in an haviour and synthesis of lower level descriptions such as HDL 5B7 5C7 5D7 follo(ing a similar scheme to that shown in ����� ������ ��������� ����� ������ ����� ������ ������ ������� ���� ����� ���� ����� ��������� ������ ������ ���� ���������� ����� ������ ���� �������� ��������� ��������� ��������� ���������� ������ ������� ��� ���� ����������� ���������� ������ Fig. 1. Proposed adaptation scheme to use a generic interpreted programming language as an HDL figure 1. This (ay it (ould be valid for both, physical im- concerning the (ay in (hich the differentiating character* plementation and simulation. Synthesis and implementation istics of hardware, such as concurrency between operations (ould use VHDL or 0erilog as an intermediate language in- will be modeled. In this regard, the particular characteristics dependent of the underlying technology. On the other hand, of the programming language under study play a +ey role. in order to use the programming language under adaptation They will have a great impact on such important issues as the as an ,0& (Hardware 0erification Language)" it should be different modeling techniques or code generation. Another able to perform cosimulation together with other modules +ey aspect of the language to use, is whether it is compiled written in VHDL and 0erilog, providing all its e-pressive or interpreted. Interpreted languages provide great flexibil- power: high-level constructs, object orientation" third party ity due to their ability to self-analysis and runtime modifica- libraries, etc... tion using introspection techniques [10]. These techniques, This article presents a particular application of the as discussed in the following sections" will be useful for Python language 5E7" based on the MyHDL package, 5D7 to this purpose. The Python language is, by his o(n philos- make it a viable alternative for hardware development. To ophy" in a unique position to be used as an HDL. Through- characterize this feasibility a study comparing the several out its development it has evolved in response to major de- aspects has been performed by designing a real peripheral sign philosophies, becoming the language in which different using independently 0erilog and MyHDL flo(s. Thus, it paradigms: imperative, functional, object oriented, etc... are aims to reach a gut feeling about the power of .ython as a reconciled to thus have one of the most eclectic developer hardware modeling tool as well as being able to evaluate its communities no(adays. expressive power and the quality of automatically generated Since this versatility and ability to cope with almost any designs. ;e should note that, although in some aspects design philosophy is the distinguishing mark of Python, it is there may be similarities between MyHDL and other so- not surprising that it has 3nally approached to hardware de- lutions such as System F or System 0erilog, there is one sign. G set of libraries called MyHDL have made this possi- feature which differentiates them unequivocally: whereas ble. The purpose of )yHDL, as defined by its creators is “to these other solutions are languages whose specific purpose provide hardware designers with the simplicity and elegance is the description of hardware at system level, Python is of the Python language“ 58]. To map the elements of a hard- a language whose development has been totally oblivious (are design flo(" we will discuss separately the three main to the specific requirements of HDLs and that through an issues: the Python hardware modeling techniquesJ simula- external library/frame(ork has been given the ability to tion and verification; and finally the generation of VHDL or model hardware designs at %TL level. 0erilog code using introspective techniques. This article is organized as follows: in section two the operation of MyHDL is analyzed highlighting its main fea- 2.1. Hardware Modeling tures, advantages and disadvantages. Section three presents the design of the peripherals on which the comparison has The main idea behind MyHDL is the use of generators 5667 been made. Section four details the comparison methodol- and decorators [12] 56>7 to model concurrency. Generators ogy used and the parameters on which both solutions were are a special type of function. Their main difference with compared. Section 3ve presents and analyzes the obtained common functions is that generators remember the e-ecu- results. Finally section six presents the most relevant con- tion point at which they return to continue at the same point clusions derived from this experience. on subsequent calls. Hardware modules are modeled as Python functions with wrapping decorators that return sets of generators. 2. PYTHON AS AN HDL: MYHDL Thus, the semantics and structure of Python functions are used to support features such as arbitrary hierarchies of The development of ,DLs based on general-purpose pro- components, named port association, etc... Besides the gramming languages involves a series of design decisions above, MyHDL defines ne( classes to model hardware