Adder and Subtractor Circuits Design Objective

Adder and Subtractor Circuits Design Objective

Chapter 03: Computer Arithmetic Lesson 03: Arithmetic Operations─ Adder and Subtractor circuits Design Objective • To understand adder circuit • Subtractor circuit • Fast adder circuit Schaum’s Outline of Theory and Problems of Computer Architecture 2 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Adder Circuit Schaum’s Outline of Theory and Problems of Computer Architecture 3 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Full Adder Circuit Schaum’s Outline of Theory and Problems of Computer Architecture 4 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Ripple carry propagation addition method using full adder circuit • Compute xi + yi + Ci1 • Each bit output zi based on three bits─ the bits at the inputs and carry-in • Carry-in─ Generated by the next-lower bit of computation Schaum’s Outline of Theory and Problems of Computer Architecture 5 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Ripple carry propagation in 8-bit adder circuit based on 8 full adders Schaum’s Outline of Theory and Problems of Computer Architecture 6 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Speed of Adder • Speed of the circuit determined by time it takes for the carry signals to propagate through all the full adders • Each full adder can’t perform its part of the computation until all the full adders to the right of it have completed their parts • The computation time grows linearly with the number of bits in the inputs Schaum’s Outline of Theory and Problems of Computer Architecture 7 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Subtractor Circuit Schaum’s Outline of Theory and Problems of Computer Architecture 8 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Subtraction • Handled by similar methods, using adder modules that compute the difference between two numbers by adding the X and two’s complement of Y • An adder-based adder-cum-subtractor circuit based on an adder circuit • Uses additional circuit of XOR gates Schaum’s Outline of Theory and Problems of Computer Architecture 9 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 XOR gate in adder-cum-subtractor • Finds the 1’s complement when subtraction of Y is to be done • Does nothing when addition of Y is to be done used in the adder circuit Schaum’s Outline of Theory and Problems of Computer Architecture 10 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 k-bit adder/subtractor Using Two’s complement converter circuit with Y Schaum’s Outline of Theory and Problems of Computer Architecture 11 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Fast Adders (High Speed Adders) and Carry Look Ahead Addition Schaum’s Outline of Theory and Problems of Computer Architecture 12 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Design of Fast Adders (High Speed Adders) and Carry Look Ahead Addition • Ripple carry adder computation time grows linearly with the number of bits in the inputs • Use of binary logic cells • Output stage sum bit = si = xi.XOR. yi . XOR. Ci • Output stage carry bit for input to (i + 1)th stage • = Ci+1 = (xi. AND. yi). OR. (xi. AND. Ci). OR . (yi. AND. Ci) • = Ci+1 = (xi.AND. yi). OR. [(xi.OR. yi.).AND. Ci)] Schaum’s Outline of Theory and Problems of Computer Architecture 13 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Design of Fast Adders (High Speed Adders) and Carry Look Ahead Addition • Output stage sum bit = si = xi.XOR. yi . XOR. Ci • Output stage carry bit for input to (i + 1)th stage = Ci+1 = (xi. AND. yi). OR. (xi. AND. Ci). OR . (yi. AND. Ci) = Ci+1 = (xi.AND. yi). OR. [(xi.OR. yi.).AND. Ci)] • Ripple carry adder computation time grows linearly with the number of bits in the inputs Schaum’s Outline of Theory and Problems of Computer Architecture 14 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Design of Fast Adders (High Speed Adders) and Carry Look Ahead Addition • Use of binary logic cells • Use k-full adders 0th to (k – 1)th for k-bit addition • An i-th stage adder circuit two logic terms─ Generating (using x bit and y bit) first term of expression • Generating component─ gi = xi .AND. yi Schaum’s Outline of Theory and Problems of Computer Architecture 15 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Propagating component • Propagating component (us carry, x and y) second term of expression • pi = xi OR yi, • An output stage carry, Ci+1 = gi + pi.Ci • Ci depends on Ci–1 • Ci–1 depends on Ci–2, and so on • Ci–1 is gi–1 + pi–1.Ci–1 Schaum’s Outline of Theory and Problems of Computer Architecture 16 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Generating and propoagating components and Carry in CGPS cell • gi = xi .AND. yi and pi = xi OR yi, • Ci+1 = gi + pi. gi–1 + pi. pi–1. gi–2 + pi. pi–1. pi–2. gi–3 + ….. + pi . pi–1. pi–2. … p0 C0 • C4 can be computed ahead using a binary logic cell having pis and gis in the inputs • C4 input to next binary logic cell Schaum’s Outline of Theory and Problems of Computer Architecture 17 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Using Binary Logic Cell outputs g0, p0, p1, g1, … Schaum’s Outline of Theory and Problems of Computer Architecture 18 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Use of 4-binary logic cells Schaum’s Outline of Theory and Problems of Computer Architecture 19 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 Summary Schaum’s Outline of Theory and Problems of Computer Architecture 20 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 We Learnt • Full adder─ Each bit output zi based on three bits─ the bits at the inputs and carry-in • Ripple carry adder computation time grows linearly with the number of bits in the inputs • Adder cum subtractor using XORs for two’s complement generation • Fast addition by carry-look-ahead computations Schaum’s Outline of Theory and Problems of Computer Architecture 21 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 End of Lesson 3 on Arithmetic Operations─ Adder and Subtractor circuits Design Schaum’s Outline of Theory and Problems of Computer Architecture 22 Copyright © The McGraw-Hill Companies Inc. Indian Special Edition 2009 .

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