STM32 MICRONTROLLER Introduction to Embedded Systems Design Introduction • What is an Embedded System? • Application-specific computer system • Built into a larger system • Why add a computer to the larger system? • Better performance • More functions and features • Lower cost • More dependability • Economics • Microcontrollers (used for embedded computers) are high-volume, so recurring cost is low • Nonrecurring cost dominated by software development • Networks • Often embedded system will use multiple processors communicating across a network to lower parts and assembly costs and improve reliability Example Embedded System: Bike Computer • Functions • Speed and distance measurement • Constraints • Size • Cost • Power and Energy • Weight • Inputs • Wheel rotation indicator • Mode key • Output • Liquid Crystal Display • Low performance MCU • 8-bit, 10 MIPS Gasoline Automobile Engine Control Unit • Functions • Fuel injection • Air intake setting • Spark timing • Exhaust gas circulation • Electronic throttle control • Knock control Image courtesy • Constraints of Freescale • Reliability in • Many Inputs and Outputs harsh environment • Discrete sensors & actuators • Cost • Network interface to rest of car • Weight • High Performance MCU • 32-bit, 3 MB flash memory, 150 - 300 MHz Benefits of Embedded Computer Systems • Greater performance and efficiency • Software makes it possible to provide sophisticated control • Lower costs • Less expensive components can be used • Manufacturing costs reduced • Operating costs reduced • Maintenance costs reduced • More features • Many not possible or practical with other approaches • Better dependability • Adaptive system which can compensate for failures • Better diagnostics to improve repair time Embedded System Functions • Closed-loop control system • Monitor a process, adjust an output to maintain desired set point (temperature, speed, direction, etc.) • Sequencing • Step through different stages based on environment and system • Signal processing • Remove noise, select desired signal features • Communications and networking • Exchange information reliably and quickly • Interfacing with larger system and environment • Analog signals for reading sensors • Typically use a voltage to represent a physical value • Power electronics for driving motors, solenoids • Digital interfaces for communicating with other digital devices • Simple - switches • Complex - displays Microcontroller vs. Microprocessor • Both have a CPU core to execute instructions • Microcontroller has peripherals for concurrent embedded interfacing and control • Analog • Non-logic level signals • Timing • Clock generators • Communications • point to point • network • Reliability and safety Microcontroller vs. Microprocessor • Roughly speaking: MCU= CPU + peripherals (e.g. memory, programmable input/output peripherals ) • ARM provides ARM IPs like Cores, internal bus, interrupt controllers, etc. • But MCUs are not created equal! MCUs from different vendors really vary due to different design decisions: • Architecture • Implementation • Processing optimization • Peripherals • Power management • Preferred tool chains • …… Attributes of Embedded Systems • Concurrent, reactive behaviors • Must respond to sequences and combinations of events • Real-time systems have deadlines on responses • Typically must perform multiple separate activities concurrently MCU Hardware & Software for Concurrency • CPU executes instructions from one or more thread of execution • Specialized hardware peripherals add dedicated concurrent processing • DMA - transferring data between memory and peripherals • Watchdog timer • Analog interfacing • Timers • Communications with other devices • Detecting external signal events • Peripherals use interrupts to notify CPU of events Concurrent Hardware & Software Operation SoftwareHardware Software Hardware Software Time • Embedded systems rely on both MCU hardware peripherals and software to get everything done on time Cortex M-x Technical presentation Contents Cortex M-x general comparison, migration and selection Overview of Cortex M0, M3, M4 and M7 cores Main technical features of Cortex M0 core (optional) Main technical features of Cortex M3 core (optional) DSP and FPU insights of Cortex M4 (optional) Main Peripherals 14 Cortex M-x general comparison, migration and selection Cortex-M Processor Portfolio • Traditional 8/16/32-bit classification is obsolete Cortex-M0 Cortex-M3 Cortex-M4 “8/16-bit” applications “16/32-bit” applications “32-bit/DSC” applications Performance efficiency MCU plus DSP Lowest cost Feature-rich Accelerated SIMD, Optimized connectivity connectivity FP and DSP Increasing performance Binary and Tool Compatible Cortex ™-M microcontroller – power highlights Active current < 200µA/MHz Sleep mode current < 50µA Deep Sleep mode current < 1µA Cortex M common features Targeting the microcontroller applications Very good power and area optimization Designed for low cost and low power Automatic state saving on interrupt and exceptions Low software overhead on exception entry and exit Deterministic instruction execution timing Instructions always take same time to execute, from a deterministic memory system 17 Cortex-M feature set comparison Cortex-M0 Cortex-M3 Cortex-M4 Architecture Version V6M v7M v7ME Instruction set architecture Thumb, Thumb-2 System Thumb + Thumb-2 Thumb + Thumb-2, Instructions DSP, SIMD, FP DMIPS/MHz 0.9 1.25 1.25 Bus interfaces 1 3 3 Integrated NVIC Yes Yes Yes Number interrupts 1-32 + NMI 1-240 + NMI 1-240 + NMI Interrupt priorities 4 8-256 8-256 Breakpoints, Watchpoints 4/2/0, 2/1/0 8/4/0, 2/1/0 8/4/0, 2/1/0 Memory Protection Unit (MPU) No Yes (Option) Yes (Option) Integrated trace option(ETM) No Yes (Option) Yes (Option) Fault Robust Interface No Yes (Option) No Single Cycle Multiply Yes (Option) Yes Yes Hardware Divide No Yes Yes WIC Support Yes Yes Yes Bit banding support No Yes Yes Single cycle DSP/SIMD No No Yes Floating point hardware No No Yes (Option) Bus protocol AHB Lite AHB Lite, APB AHB Lite, APB CMSIS Support Yes Yes Yes 18 Cortex-M processors binary compatible 19 Cortex-M – firmware compatibility(1/2) • Cortex M processors are FW and binary compatible • Migrating path M0->M3->M4 is straight forward • Instruction set of Cortex-Mx is strictly included in the instruction set of Cortex-My (for x<y), allowing direct migration, while taking advantage of higher MCU clock speed and von Neumann to Harvard performance increase • Re-compilation of the code is recommended • From Cortex-M0 to Cortex-M3, in order to fully take advantage of the higher performance ISA (e.g. HW division) • From M0/M3 to M4 w/ FPU, in order to generate the FPU code 20 Cortex-M – firmware compatibility(2/2) • Code density is equivalent on the different Cortex-M implementations • Code size differences for usual codes are bellow few percents, provided that the same optimizations options are chosen in the compiler • Within the STM32 family, common peripheral set compatibility is guaranteed in order to take full advantage of this simple migration path • Using the STM32 CMSIS library makes this porting very easy 21 Overview of Cortex M0, M3 and M4 cores Cortex-M0 processor microarchitecure • ARMv6M Architecture • Thumb-2 Technology • Integrated configurable NVIC • Compatible with Cortex-M3 • Microarchitecture • 3-stage pipeline with branch speculation • 1x AHB-Lite Bus Interfaces • Configurable for ultra low power • Deep Sleep Mode, Wakeup Interrupt Controller • Flexible configurations for wider applicability • Configurable Interrupt Controller (1-32 Interrupts and Priorities) • No Memory Protection Unit • Optional Debug & Trace 23 M0 – a low cost Cortex-M processor • Address “low end” applications, as a 8/16-bit MCU replacement • Similar gate count to 16-bit processors • High performance; only 25-30% lower than the standard Cortex-M3 32-bit architecture • From the global MCU price point, it is lower than most of 8/16-bit processors due to lower code memory footprint (similar, in a few percent range to the Cortex-M3) 24 Cortex-M3 processor microarchitecture • ARMv7ME Architecture • Thumb-2 Technology • Integrated configurable NVIC • Microarchitecture • 3-stage pipeline with branch speculation • 3x AHB-Lite Bus Interfaces • Configurable for ultra low power • Deep Sleep Mode, Wakeup Interrupt Controller • Flexible configurations for wider applicability • Configurable Interrupt Controller (1-240 Interrupts and Priorities) • Optional Memory Protection Unit • Optional Debug & Trace 25 Cortex-M4 processor microarchitecture • ARMv7ME Architecture • Thumb-2 Technology • DSP and SIMD extensions • Single cycle MAC (Up to 32 x 32 + 64 -> 64) • Optional single precision FPU • Integrated configurable NVIC • Compatible with Cortex-M3 • Microarchitecture • 3-stage pipeline with branch speculation • 3x AHB-Lite Bus Interfaces • Configurable for ultra low power • Deep Sleep Mode, Wakeup Interrupt Controller • Power down features for Floating Point Unit • Flexible configurations for wider applicability • Configurable Interrupt Controller (1-240 Interrupts and Priorities) • Optional Memory Protection Unit • Optional Debug & Trace 26 M4 - another Cortex-M processor • Address new markets requiring digital signal control • Digital Signal (Processor + Micro) Controller MCU DSP Harvard architecture Ease of use Single cycle MAC C Programming Cortex-M4 Floating Point Interrupt handling Barrel shifter Ultra low power • An intelligent blend of MCU and DSP features demanded • Upper limits of bandwidth challenged