Model Composer User Guide UG1262 (v2019.1) May 22, 2019 See all versions of this document Revision History Revision History The following table shows the revision history for this document. Section Revision Summary 5/22/2019 Version 2019.1 Chapter 1: Introduction • Mentioned that Model Composer provides an untimed and bit-accurate model. • Added What's New and Limitations. Importing C/C++ into Model Composer • Added discussion of source blocks and SampleTime parameter. • Added Using Complex Types Pragmas for xmcImportFunction • Edited SUPPORTS_STREAMING and BUFFER_DPETH pragmas. • Added XMC THROUGHPUT_FACTOR. Launch the Debug Tool Added a note regarding exceptions in Visual Studio. Chapter 4: Generating Outputs Added Model Composer Log File Appendix B: Model Composer Block Library Added RTL IP-Based Blocks Model Composer Blocks Added the following new blocks to Model Composer Blocks: • FIR • FFT • IFFT UG1262 (v2019.1) May 22, 2019Send Feedback www.xilinx.com Model Composer User Guide 2 Table of Contents Revision History...............................................................................................................2 Chapter 1: Introduction.............................................................................................. 5 What is Model Composer........................................................................................................... 5 What's New and Limitations......................................................................................................7 Chapter 2: Creating a Model Composer Design.............................................9 Launching Model Composer....................................................................................................10 Creating a New Model.............................................................................................................. 11 Adding Blocks to a Model.........................................................................................................12 Connecting Blocks.....................................................................................................................14 Working with Data Types......................................................................................................... 15 Creating a Top-Level Subsystem Module...............................................................................26 Chapter 3: Importing C/C++ Code as Custom Blocks................................27 Introduction............................................................................................................................... 27 Using the xmcImportFunction Command............................................................................. 27 Importing C/C++ into Model Composer................................................................................. 30 Defining Blocks Using Function Templates............................................................................35 Pragmas for xmcImportFunction............................................................................................48 Adding Your Library to Library Browser.................................................................................54 Debugging Imported Blocks....................................................................................................56 Chapter 4: Generating Outputs...........................................................................62 Introduction............................................................................................................................... 62 Adding the Model Composer Hub.......................................................................................... 62 Controlling the Throughput of the Implementation............................................................ 65 Defining the Interface Specification....................................................................................... 71 Generating Packaged IP for Vivado........................................................................................ 75 Generating System Generator IP............................................................................................ 79 Generating C++ Code................................................................................................................84 Model Composer Log File.........................................................................................................86 UG1262 (v2019.1) May 22, 2019Send Feedback www.xilinx.com Model Composer User Guide 3 Chapter 5: Simulating and Verifying Your Design..................................... 87 Introduction............................................................................................................................... 87 Simulating in Simulink.............................................................................................................. 88 Managing the Model Composer Cache..................................................................................88 Verifying the C++ Code............................................................................................................. 89 Verifying the C/RTL Code......................................................................................................... 90 Appendix A: Select Target Device or Board....................................................92 Device Chooser Dialog Box...................................................................................................... 92 Appendix B: Model Composer Block Library................................................. 94 Supported Simulink Blocks...................................................................................................... 94 Model Composer Block Taxonomy......................................................................................... 95 RTL IP-Based Blocks.................................................................................................................. 99 Model Composer Blocks.........................................................................................................101 Appendix C: Additional Resources and Legal Notices........................... 246 Xilinx Resources.......................................................................................................................246 Documentation Navigator and Design Hubs...................................................................... 246 References................................................................................................................................247 Please Read: Important Legal Notices................................................................................. 247 UG1262 (v2019.1) May 22, 2019Send Feedback www.xilinx.com Model Composer User Guide 4 Chapter 1 Introduction What is Model Composer Model Composer is a Model-Based design tool that enables rapid design exploration within the MathWorks Simulink® environment and accelerates the path to production for Xilinx® programmable devices through automatic code generation. Simulink, an add-on product to MATLAB®, provides an interactive, graphical environment for modeling, simulating, analyzing and verifying system-level designs. Model Composer is built as a Xilinx toolbox that fits into the MathWorks Simulink environment and allows algorithm developers to fully leverage all the capabilities of Simulink’s graphical environment for algorithm design and verification. You can express your algorithms in Simulink using blocks from the Model Composer library as well as custom user-imported blocks. Model Composer transforms your algorithmic specifications to production-quality IP implementations using automatic optimizations and leveraging the high-level synthesis technology of Vivado® HLS. Using the IP integrator in the Vivado Design Suite you can then integrate the IP into a platform that, for example, may include a Zynq® device, DDR3 DRAM, and a software stack running on the Arm® processor. Model Composer provides a library of over 80 optimized blocks for use within the Simulink environment. These include basic functional blocks for expressing algorithms like Math, Linear Algebra, Logic and Bit-wise operations and others. It also includes a number of application- specific blocks for Image Processing and Computer Vision. The Xilinx Model Composer block library contains the following categories of elements: Table 1: Xilinx Model Composer Block Library Library Description Computer Vision Blocks that support the analysis, manipulation and optimization of a digitized image. Logic and Bit Operations Blocks that supports the compound logical operations and bit-wise operations. Lookup Tables Block set that performs a one dimensional lookup operation with an input index. Math Functions Blocks that implement mathematical functions. UG1262 (v2019.1) May 22, 2019Send Feedback www.xilinx.com Model Composer User Guide 5 Chapter 1: Introduction Table 1: Xilinx Model Composer Block Library (cont'd) Library Description Ports and Subsystems Blocks that allow creation of subsystems and input/output ports. Relational Operations Block set to define some kind of relation between two entities (e.g.: Numerical Equality and inequalities). Signal Attributes Includes block which helps to maintain the compatibility between input type and output type (e.g. Type casting). Signal Operations Blocks that support simple modifications to the time variable of the signal to generate new signals (e.g. Unit Delay). Signal Routing Blocks that