ISSUE 50, FALL 2004ISSUE 50, FALL XCELL JOURNAL XILINX, INC. Issue 50 Fall 2004 XcellXcelljournaljournal THETHE AUTHORITATIVEAUTHORITATIVE JOURNALJOURNAL FORFOR PROGRAMMABLEPROGRAMMABLE LOGICLOGIC USERSUSERS MEMORYMEMORY DESIGNDESIGN Streaming Data at 10 Gbps Control Your QDR Designs PARTNERSHIP 20 Years of Partnership Author! Author! Programmable WorldWorld 20042004 SOFTWARE Algorithmic C Synthesis The Need for Speed MANUFACTURING Lower PCB Mfg. Costs Optimize PCB Routability R COVER STORY FPGAs on Mars The New SPARTAN™-3 Make It You r ASIC The world’s lowest-cost FPGAs Spartan-3 Platform FPGAs deliver everything you need at the price you want. Leading the way in 90nm process technology, the new Spartan-3 devices are driving down costs in a huge range of high-capability, cost-sensitive applications. With the industry’s widest density range in its class — 50K to 5 Million gates — the Spartan-3 family gives you unbeatable value and flexibility. Lots of features … without compromising on price Check it out. You get 18x18 embedded multipliers for XtremeDSP™ processing in a low-cost FPGA. Our unique staggered pad technology delivers a ton of I/Os for total connectivity solutions. Plus our XCITE technology improves signal integrity, while eliminating hundreds of resistors to simplify board layout and reduce your bill of materials. With the lowest cost per I/O and lowest cost per logic cell, Spartan-3 Platform FPGAs are the perfect fit for any design … and any budget. MAKE IT YOUR ASIC The Programmable Logic CompanySM For more information visit www.xilinx.com/spartan3 Pb-free devices available now ©2004 Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124. Europe +44-870-7350-600; Japan +81-3-5321-7711; Asia Pacific +852-2-424-5200; Xilinx is a registered trademark, Spartan and XtremeDSP are trademarks, and The Programmable Logic Company is a service mark of Xilinx, Inc. LETTER FROM THE EDITOR Thank You for Making Xilinx Number One Ever have one of those days where you’re working hard, nose to the grindstone, striving to make sure EDITOR IN CHIEF Carlis Collins your latest project is on time and on target; and then suddenly out of nowhere, you overhear some- [email protected] 408-879-4519 one complimenting your efforts? It’s not a comment that you solicited, but independently you find out that all of your hard work is recognized as the best among your peers and you’re headed in the MANAGING EDITOR Forrest Couch [email protected] right direction. 408-879-5270 CMP Media LLC, the parent company of EETimes, just dropped quite a few kudos on the Xilinx ASSISTANT MANAGING EDITOR Charmaine Cooper Hussain Edoorstep. Most of you know that every year CMP conducts a PCB and IC electronic design tool industry survey to sample the engineering community’s view on design tool providers. This year, at the XCELL ONLINE EDITOR Tom Pyles [email protected] 2004 Design Automation Conference, CMP announced the results of their first FPGA vendor survey. 720-652-3883 The ratings are striking. In 21 out of 22 categories measuring everything from best pre-sales support ADVERTISING SALES Dan Teie to brand and tool awareness, from most ethical company to customer loyalty, FPGA designers chose 1-800-493-5551 Xilinx as the top FPGA vendor. We received the highest rankings in best after-sales support, best ART DIRECTOR Scott Blair documentation, current technology leader, technology leader in three years, clear vision of the future, best integration with other vendors’ tools, well-managed company, and more. We were also able to hear the industry concerns. Respondents cited the accuracy and integrity of FPGA tools as their biggest design issue, followed closely by functional verification, timing closure, and the Xcell journal ability of those tools to easily handle complex designs. They also said that the majority of their design Xilinx, Inc. time was spent in place and route, synthesis, and HDL simulation, followed by timing analysis and 2100 Logic Drive San Jose, CA 95124-3400 floorplanning. One-third of the respondents also use formal verification, while almost half regularly Phone: 408-559-7778 FAX: 408-879-4780 use signal integrity and C language system-level tools. ©2004 Xilinx, Inc. All rights reserved. On behalf of all of the employees at Xilinx, thank you. We hear you loud and clear. Our primary goal The Xcell Journal is published quarterly. XILINX, the Xilinx is to put a programmable device in every piece of electronic equipment over the next 10 years. It’s nice logo, CoolRunner, RocketChips, Rocket IP, Spartan, StateBENCH, StateCAD, Virtex, Virtex-II, and XACT are regis- to hear that we’re on the right path to get there. tered trademarks of Xilinx, Inc. ACE Controller, ACE Flash, Alliance Series, AllianceCORE, Bencher, ChipScope, Configuration Logic Cell, CORE Generator, CoreLINX, Dual Block, EZTag, Fast CLK, Fast CONNECT, Foundation, Gigabit Speeds…and Beyond!, HardWire, HDL Bencher, IRL, J Drive, Jbits, LCA, LogiBLOX, Logic Cell, Logic Professor, MicroBlaze, MicroVia, MultiLINX, NanoBlaze, PicoBlaze, PLUSASM, PowerGuide, PowerMaze, QPro, Real-PCI, RocketIO, RocketPHY, SelectIO, SelectRAM, SelectRAM+, Silicon Xpresso, Smartguide, Smart-IP, SmartSearch, SMARTswitch, System ACE, Testbench In A Minute, TrueMap, UIM, VectorMaze, VersaBlock, VersaRing, Virtex-4, Virtex-II Pro, Virtex-II Pro X, Virtex-II EasyPath, Wave Table, WebFITTER, WebPACK, WebPOWERED, XABLE, XAPP, X- BLOX+, XC designated products, XChecker, XDM, XEPLD, Xilinx Foundation Series, Xilinx XDTV, Xinfo, XtremeDSP, Forrest Couch and ZERO+ are trademarks, and The Programmable Logic Managing Editor Company is a service mark of Xilinx, Inc. Other brand or product names are registered trademarks or trademarks of their respective owners. The articles, information, and other materials included in this issue are provided solely for the convenience of our readers. Xilinx makes no warranties, express, implied, statutory, or otherwise, and accepts no liability with respect to any such articles, information, or other materials or their use, and any use thereof is solely at the risk of the user. Any person or entity using such information in any way releases and waives any claim it might have against Xilinx for any loss, damage, or expense caused thereby. FALL 2004, ISSUE 50 Xcell journal COVER STORY View from the Top................................................................5 FPGAs on Mars FPGAs on Mars.....................................................................8 Xilinx FPGAs have transitioned from a flight ASIC prototyping platform Streaming Data at 10 Gbps .................................................13 to playing integral roles in the Mars Exploration Rover Mission. Control Your QDR Designs ....................................................16 8 Celebrating 20 Years of Partnership.......................................21 Author! Author! .................................................................25 Experience Programmable World 2004..................................30 Streaming Data Managing Partial Dynamic Reconfiguration.............................32 at 10 Gbps Nucleus RTOS for Xilinx FPGAs..............................................38 Using a Virtex-II FPGA to stream data from DDR-SDRAM Implement an Embedded System with FPGAs.........................43 to OC-192 serializers. Algorithmic C Synthesis .......................................................46 13 Design Tool Performance Lowers Costs...................................52 The Need for Speed............................................................54 Celebrating 20 Years Lower Your PCB Manufacturing Costs.....................................57 of Partnership Plan FPGA Signal Assignments..............................................60 Turning an industry cliché into Next-Generation Data Transport.............................................64 a successful business model. Designing Next-Generation Wireless Systems..........................68 21 Meeting Interoperability Standards........................................70 Xilinx Partner Yellow Pages..................................................74 Reference Pages.................................................................82 Next-Generation Data Transport over Metro Area Networks To receive a free subscription The Xilinx GFP core enables efficient to the printed Xcell Journal, transport of LAN/SAN over SONET-based networks. or to view the Web-based Xcell Online, 64 visit www.xilinx.com/xcell/. Viewfrom the top Preparing for a Bright Future The economy is improving and most analysts predict that the semiconductor industry will grow for the next two years. Here’s what I see ahead for Xilinx. We recently emerged from a three-year recession that was one of the longest and deepest in our history, yet things are getting better. The semicon- ductor industry typi- by Wim Roelandts cally moves in a CEO, Xilinx, Inc. two-year cycle, unless it is influenced by events such as the 9/11 tragedy. Therefore, after two years of growth, an overbuilding of capacity will likely occur, with another market correction in 2006. This is a normal and predictable cycle; it’s the way our industry usually works. These capacity-driven recessions tend to be shallow and short – the last one was in 1996 and lasted about 18 months. For Xilinx® dur- ing that period, we had a few negative growth quarters, with an overall 1% growth. The market recovery is still fragile, driven primarily by the U.S. and China. And not all of the industries that we deal with are yet in recov- ery,