Version 1.1 Nintendo Ultra64 RSP Programmer’s Guide Silicon Graphics Computer Systems, Inc. 2011 N. Shoreline Blvd. Mountain View, CA 94043-1389 ©1996 Silicon Graphics Computer Systems, Inc. All Rights Reserved. 1 2 Table of Contents 1. Introduction ..................................................................................................................... 15 Document Description ................................................................................................. 16 What It Is .................................................................................................................. 16 What It Is Not .......................................................................................................... 16 Information Presentation ....................................................................................... 17 RSP Software Development Tools.............................................................................. 19 rspasm....................................................................................................................... 19 cpp............................................................................................................................. 20 m4.............................................................................................................................. 21 buildtask................................................................................................................... 21 rsp2elf ....................................................................................................................... 21 rsp, rspg.................................................................................................................... 21 Gameshop Debugger (gvd) ................................................................................... 22 2. RSP Architecture ............................................................................................................. 23 Overview........................................................................................................................ 24 Slave to the CPU...................................................................................................... 24 Part of the RCP ........................................................................................................ 24 R4000 Core ............................................................................................................... 25 Clock Speed.............................................................................................................. 26 Vector Processor...................................................................................................... 26 Major R4000 Differences .............................................................................................. 27 Pipeline Depth......................................................................................................... 27 No Interrupts, Exceptions, or Traps..................................................................... 27 Coprocessors............................................................................................................ 27 Missing Instructions ............................................................................................... 27 3 Modified Instructions............................................................................................. 28 IMEM .............................................................................................................................. 29 Addressing............................................................................................................... 29 Explicitly Managed................................................................................................. 29 DMEM ............................................................................................................................ 30 Addressing............................................................................................................... 30 Explicitly Managed Resource................................................................................ 30 External Memory Map ................................................................................................. 31 Scalar Unit Registers..................................................................................................... 32 SU Register Format................................................................................................. 32 Register 0 .................................................................................................................. 32 Register 31 ................................................................................................................ 32 SU Control Registers............................................................................................... 33 Vector Unit Registers.................................................................................................... 34 VU Register Format ................................................................................................ 34 VU Register Addressing ........................................................................................ 34 Computational Instructions........................................................................ 34 Loads, Stores, and Moves ........................................................................... 35 Accumulator ............................................................................................................ 36 VU Control Registers.............................................................................................. 36 Vector Compare Code Register (VCC) ..................................................... 36 Vector Carry Out Register (VCO).............................................................. 37 Vector Compare Extension Register (VCE).............................................. 38 SU and VU Interaction ................................................................................................. 39 Dual Issue of Instructions ...................................................................................... 39 RSP Instruction Set........................................................................................................ 40 Instruction Formats................................................................................................. 40 SU Instruction Format ................................................................................. 40 4 Revision 1.0 VU Instruction Format ................................................................................ 40 Distinguishing SU and VU Instructions .............................................................. 40 Illegal Instructions .................................................................................................. 40 Execution Pipeline ........................................................................................................ 41 RSP Block Diagram................................................................................................. 41 Mary Jo’s Rules........................................................................................................ 43 Register Hazards..................................................................................................... 43 SU is Bypassed......................................................................................................... 44 Coprocessor 0 ............................................................................................................... 45 Interrupts, Exceptions, and Processor Status............................................................ 46 Interrupts.................................................................................................................. 46 Exceptions ................................................................................................................ 46 Processor Status....................................................................................................... 46 3. Vector Unit Instructions................................................................................................. 47 VU Loads and Stores .................................................................................................... 48 Normal...................................................................................................................... 50 Packed....................................................................................................................... 52 Transpose ................................................................................................................. 54 VU Register Moves ....................................................................................................... 56 VU Computational Instructions.................................................................................. 57 Using Scalar Elements of a Vector Register ........................................................ 58 VU Multiply Instructions............................................................................................. 61 Vector Multiply Examples ..................................................................................... 64 VU Add Instructions .................................................................................................... 67 Vector Add Examples............................................................................................