Analog Circuits and Signal Processing Series Editors Mohammed Ismail Mohamad Sawan For further volumes: http://www.springer.com/series/7381 Juan Pablo Alegre Pérez • Santiago Celma Pueyo Belén Calvo López Automatic Gain Control Techniques and Architectures for RF Receivers 1 3 Juan Pablo Alegre Pérez Belén Calvo López LSI Corporation University of Zaragoza Madrid Zaragoza Spain Spain [email protected] [email protected] Santiago Celma Pueyo University of Zaragoza Zaragoza Spain [email protected] ISBN 978-1-4614-0166-7ââ e-ISBN 978-1-4614-0167-4 DOI 10.1007/978-1-4614-0167-4 Springer New York Dordrecht Heidelberg London Library of Congress Control Number: 2011933911 © Springer Science+Business Media, LLC 2011 All rights reserved. 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Printed on acid-free paper Springer is part of Springer Science+Business Media (www.springer.com) Preface Receivers have been a basic block in telecommunication systems since the inven- tion of the radio in the late 19th century, acquiring an essential role in what has been called the third Communication Revolution where information is transferred via controlled waves and electronic signals. Their main function is to recover the information from the transmitted wave and convert it to electronic signals that can be understood by the succeeding electronic processing signal systems. Since the Internet revolution, new receivers appeared to connect computers one to another or to the World Wide Web, such as wireless systems, have been gaining more and more popularity over the last few years. Thus, great investments in time, effort and money from both academia and industry have been made in the development of these re- ceivers in order to achieve fully integrated solutions in form of ASICs meeting the demand for ever increasing high performance with low cost, low voltage supply, low power consumption and reduced surface area. The design of one of these receivers include different blocks such as filters, low noise amplifiers, gain controlled amplifiers, mixers and analog to digital converters. This book is precisely focused on the analysis and design of automatic gain control, AGC, circuits with wireless receivers as the main target application. In this context, the general function of the AGC circuitry is to automatically adjust the output sig- nal of a variable gain amplifier to an optimal rated level, for different input signal strengths. This function is essential to guarantee that the system dynamic range is neither saturated with large signals nor makes the system fall below a tolerable noise level. Specifically, some wireless applications, such as WLAN or Bluetooth, must be able to handle packets-based data transmission and orthogonal frequency division multiplexing which introduce stringent settling-time constraints. Thus, fast AGCs are primordial in those systems. It is under these conditions that feedforward AGCs present their greatest advantages as an alternative to conventional feedback AGCs. Thus, all through this book we offer a detailed study about feedforward AGCs de- sign—both at basic AGC cells and system level—, their main characteristics and performances. v vivi Preface The starting point is a complete review and theoretical analysis of both feed- forward and feedback configurations and their behavioural modelling, issues ad- dressed in Chap. 2. Next, basic components in gain control function, i.e., variable/programmable gain amplifiers, peak detectors and control voltage generation circuits are exam- ined. These basic blocks must be carefully chosen as they will limit the full AGC performance, so their specifications have to guarantee those required by the corre- sponding application. Thus, the main challenges and solutions encountered during the design of such high performance cells are summarized in Chap. 3 and different high performance integrated proposals that will be next employed in specific AGCs are described and characterized considering low voltage low power constraints. To achieve low power consumption and ease any future scale to shorter transistor chan- nel length technologies, low voltage power supplies have been employed: this re- quires greater effort in the design, but guarantees the validity of the achieved results in current submicron process technologies. To close, the work is focused on the complete characterization of few different gain control loops required to implement a complete AGC system making use of some previously studied cells. Three complete AGC proposals are fully designed and evaluated in Chap. 4: a general purpose digital feedforward CMOS AGC op- erating at 100 MHz, a fully analogue feedforward AGC for an 802.11a WLAN re- ceiver in SiGe BiCMOS technology and a combined feedforward/feedback CMOS AGC for operating frequencies up to 250 MHz. These novel AGC contributions, more than competitive with those already presented in the literature, prove that feedforward AGCs are a fine alternative in wireless receiver applications, evidenc- ing that this class of circuits will take an important role in upcoming applications where the stringent time constraints preclude the use of conventional closed-loop AGCs. Contents 1âIntroduction ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿ â 1 1.1âAGC Design Strategies �����������������������ï â 3 1.2âAGC Architectures for RF Receivers ����������������ï â 6 1.3âOutline of the Work �������������������������ï â 8 References ��������������������������������� 10 2âAGC Fundamentals ���������������������������ï 13 2.1âAGC Loop Fundamentals ����������������������ï 14 2.1.1âAGC with Feedback Loop ������������������ 14 2.1.2âAGC with Feedforward Loop ����������������ï 20 2.2âMatlab Simulations �������������������������ï 21 2.2.1âAGC with Feedback Loop ������������������ 21 2.2.2âAGC with Feedforward Loop ����������������ï 25 2.3âConclusions �����������������������������ï 26 References ��������������������������������� 27 3âBasic AGC Cells �����������������������������ï 29 3.1âVariable Gain Amplifiers ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿½ï¿ 29 3.1.1âDegeneration Based VGA Structures. Proposed VGA1 ��� 32 3.1.2âMultiplier-Based VGA Structures. Proposed VGA2 and VGA3 ��������������������������ï 35 3.1.3âComplete VGA Architecture Design Considerations ����ï 51 3.1.4âConclusions �������������������������ï 52 3.2âPeak Detectors ���������������������������� 54 3.2.1âBasic Peak Detector Topologies ��������������� 55 3.2.2âOpen-Loop Envelope Detectors. Proposed PD1 and PD2 ���������������������������ï 57 3.2.3âClosed-Loop Envelope Detectors. Proposed PD3 and PD4 ���������������������������ï 66 3.2.4âS/H Based Envelope Detector.