Suchitra Sathyanarayana +1-858-717-2399 [email protected]

Suchitra Sathyanarayana +1-858-717-2399 Suchi.Sathya@Gmail.Com

Suchitra Sathyanarayana +1-858-717-2399 [email protected] EDUCATION Doctor of Philosophy Nanyang Technological University, Singapore (Thesis submitted) M.Eng. (by research) Computer Eng., Nanyang Technological University, Singapore [2004-2006] B.Eng. (with Honors) Computer Eng., Nanyang Technological University, Singapore [1999-2003] RESEARCH EXPERIENCE Image Processing Architectures: Responsible for innovating high speed image processing cores by exploiting underlying parallelisms and image symmetries - (i) line feature extractor based on Hough Transform, which gives 1000x speedup; (ii) a novel parallel image rotation engine that achieves order of magnitude speedups especially for high-resolution images; (iii) low-cost pattern recognition system that achieves on-the-fly image rotation using line buffers and recognition using a simplified MLP neural network; (iv) a parallel EZW Wavelet encoding architecture that can be deployed for Haar based image compression systems. Hardware efficient techniques for Vision based Advanced Driver Assistance: As part of my PhD thesis, I developed computationally efficient techniques that detects and classifies various kinds of road markings, including lane markings, arrow markings of different types, zigzag markings, pedestrian markings etc. The proposed techniques are scale-invariant, hardware efficient and robust to complexities in road scenes such as shadows, lighting and weather changes. Vision-based Medical Applications: As part of my M.Eng (by research) thesis, I developed real-time techniques to assess the movements of camera during medical endoscopy. This included methods to infer camera rotations and longitudinal movements using image unrolling and corresponding matching of features. I am also currently involved with another PhD project on vision-based patient monitoring system, using multiple cues such as breathing and movements to infer abnormal patient behavior. CORDIC Architectures: I was instrumental in innovating a sign prediction based CORDIC using the redundant number system, that lends well for high speed image rotation. I also built a novel algorithm that eliminates the need for sign precomputation in CORDIC, thereby parallelizing it. I also proposed a unified CORDIC based image processor that can be customized for a range of image processing operations. The above work has been published in over 15 international conferences and 4 reputed international journals. WORK EXPERIENCE Research Associate Center for High Performance Embedded Systems, Nanyang Jun 2011 – Jan 2013 Technological University, Singapore Project Officer Center for High Performance Embedded Systems, Nanyang Jun 2003 - 2009 Technological University, Singapore Project Intern, National Computer Systems Pte Ltd, Singapore Jan – Jun 2002 JOURNALS [1] R. K. Satzoda, S. Suchitra, T. Srikanthan and S. Supriya, “Hierarchical Additive Hough Transform for Lane Detection”, IEEE Embedded Systems Letters, vol. 2 (2), pp. 23 – 26, June 2010. [2] S. Suchitra, R. K. Satzoda and T. Srikanthan, “Exploiting Inherent Parallelisms for Accelerating Linear Hough Transform”, IEEE Transactions on Image Processing, vol. 18, No. 10, pp. 2255-2264, October 2009. [3] R. K. Satzoda, S. Suchitra and T. Srikanthan, “Parallelizing the Hough Transform Computation,” IEEE Signal Processing Letters, vol. 15, pp. 297-300, 2008. [4] S. Suchitra, C. T. Clarke, S. K. Lam and T. Srikanthan, "Accelerating rotation of high-resolution images", IEE Proceedings on Vision, Image and Signal Processing, vol. 153, no. 6, pp. 815-824, Dec 2006. CONFERENCES [5] S. Suchitra, R.K. Satzoda and T. Srikanthan , " Detection & Classification of Arrow Markings on Roads using Signed Edge Signatures", IEEE Intelligent Vehicles Symposium - IV'2012, pp. 796-801, June 2012. [6] R.K. Satzoda, S. Suchitra and T. Srikanthan , "Robust Extraction of Lane Markings Using Gradient Angle Histograms and Directional Signed Edges", IEEE Intelligent Vehicles Symposium - IV'2012, pp. 754-759, June 2012. [7] R .K. Satzoda, S. Suchitra, T. Srikanthan and J.Y. Chia, "Vision-based Vehicle Queue Detection at Traffic Junctions", 7th IEEE Conference on Industrial Electronics and Applications, pp. 85-90, Jul 2012. [8] S. Suchitra, R. K. Satzoda and T. Srikanthan, “Selective Extraction of Curvilinear Edges using Gradient Angle Histograms”, International Conference on Communications and Signal Processing, Kochi, Kerala, pp. 358 – 362, Feb 2011. [9] S. Suchitra, R. K. Satzoda and T. Srikanthan, “Accelerating CORDIC for Hough Transform”, International Symposium on Integrated Circuits, Singapore, pp. 167 – 170, Dec 2009. [10] R. K. Satzoda, S. Suchitra and T. Srikanthan, “Gradient Angle Histograms for Efficient Linear Hough Transform”, IEEE International Conference on Image Processing (ICIP), pp. 3273 – 3276, Nov 2009. [11] R. K. Satzoda, S. Suchitra and T. Srikanthan, “Techniques for Area-Time Efficient Image Rotation”, IEEE International Symposium on Circuits and Systems (ISCAS), pp. 940 – 943 Taipei, May 2009. [12] D. H. Linh, R. K. Satzoda, S. Suchitra and T. Srikanthan, “Improving robustness of real-time geo- registration process”, IEEE International Conference on Neural Networks and Signal Processing, pp. 717 – 721, Zhenjiang, June 2008. [13] S. Suchitra, T. Srikanthan and C. T. Clarke, “Real time tracking of camera motion through cylindrical passages”, 15th International Conference on Digital Signal Processing, pp. 455 - 458, July 2007. [14] S. Suchitra, R. K. Satzoda and T. Srikanthan, “Unified CORDIC-based Processor for Image Processing,” 15th International Conference on Digital Signal Processing, pp. 343-346, July 2007. [15] R. K. Satzoda, S. Suchitra and T. Srikanthan, “Low Area-time Complexity Averaging Scheme for Thumbnail Generation,” International Conference on Automation, Robotics and Vision, pp. 1-4, Dec. 2006. [16] S. Suchitra, S. Sneha, T. Srikanthan, C. T. Clarke, "Elimination of Sign Precomputation in Flat CORDIC", IEEE International Symposium on Circuits and Systems (ISCAS), pp. 3319-3322, May 2005. [17] S. Suchitra, C.S. Lim and T. Srikanthan, "Array based Architecture for EZW Image Encoding on FPGA using Handel-C", 38th Annual Asilomar Conference on Signals, Systems, and Computers, pp.447- 450, November 7-10, 2004. [18] S. Suchitra, S. K. Lam, T. Srikanthan, "Novel Schemes for High-Throughput Image Rotation", 38th Annual Asilomar Conference on Signals, Systems, and Computers, pp.1884-1888, November 7-10, 2004. [19] S. Suchitra, S.K. Lam and T. Srikanthan, "High-Throughput Image Rotation using Sign-Prediction based Redundant CORDIC Algorithm", IEEE International Conference on Image Processing (ICIP), pp. 2833-2836, October 2004. PROJECTS SUPERVISED Accelerating signal processing functions on Infineon Tricore - Shantanu (Summer Internship Project, Indian Institute of Technology, Mumbai), May 12 - Jul 12 Automated edge detection - Udit Dhawan (Summer Internship Project, Indian Institute of Technology, Roorkee), Jun 09 – Aug 09 Hierarchical Hough tranform - Supriya Sathyanarayana (Internship Project, RV College of Engineering, Bangalore), Jul 08 – Jun 09 Vehicle detection using vision-enabled embedded systems - Harishankar Ramasubramaniam (Internship Project, Velammal Engineering College, Chennai), Jul 08 – Nov 08 Smart camera system for outdoor car parks - Doong Xuecheng Andrew (Final Year Project, Nanyang Technological University), 2008 Vision-enabled traffic light management system - Jin Yuan (Final Year Project, Nanyang Technological University), 2008 3-D rendering for geo-registration on NIOS-based embedded platform - Wu Meiqing (Masters Project, Peking University, China), Abhishek (Summer Internship Project, Indian School of Mines, Dhanbad), Oct 07 – Mar 08 Vehicle license plate extraction and recognition - Sudip Roy (Summer Internship Project, Indian Institute of Technology, Kharagpur), May 07 – Jul 07 Lane departure warning system using Hough signatures - N Anil Krishna (Summer Internship Project, Indian Institute of Technology, Mumbai) May 07 – Jul 07 Crowd estimation at bus stops using vision-enabled embedded system - Kushal Anand (Summer Internship Project, Indian School of Mines, Dhanbad), May 07 – Jul 07 Intelligent traffic monitoring system – Sravanthi Surya (Summer Internship Project, Indian School of Mines, Dhanbad), May 07 – Jul 07 Design of an energy efficient system for still picture compression using wavelet transform – Ashish Sharma (Internship Project, Indian Institute of Technology, Chennai), May – Jul 04 Flat CORDIC based Sine-Cosine Generator – S. Sneha (Final Year Project, Nanyang Technological University), 2004 SPECIAL AWARDS/SCHOLARSHIPS SIA/NOL Scholar [1999]: Awarded the prestigious SIA/NOL scholarship to pursue undergraduate studies in Nanyang Technological University under the aegis of the Ministry of Education, Singapore Merit Certificate Award [2006]: Awarded by Singapore Indian Fine Arts Society for excellence in Indian Classical Vocal REFERRALS Prof Srikanthan Thambipillai Dr. Christopher Clarke Chair, School of Computer Engineering Lecturer, Director of Studies Director, Centre for High Performance School of Electronic and Electrical Embedded Systems Nanyang Engineering Technological University, Singapore University of Bath, United Kingdom Email: [email protected] Email: [email protected] .

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