Computer Systems II Basics of I/O and Multiprogramming 1 Introductions q Name q Preferred Name q Pronouns (she/he/they) What is Multiprogramming? q Several processes running concurrently on the same CPU - The CPU executes part of one process, then part of another, and so on (not true parallelism) Single programming Multi-programming (the down arrows indicate CPU time) Why Multiprogramming? q Computers communicate with the outside world via I/O devices q Timing problem: I/O devices much slower than the CPU – For example, while typing 10 characters per second, the CPU could execute more than two billion instructions in that same second! q What should the CPU do while the I/O completes? – Solution to keeping the CPU busy: multiprogramming – If multiple processes run concurrently, the CPU can switch to another one I/O Device Controllers q Special purpose processors that carry I/O operations - Each controller is in charge of a particular device type - Each controller has registers, local buffer - I/O is from the device to local buffer of controller q CPU and I/O devices execute in parallel I/O Operation Example c = getchar(); What happens? CPU Keyboard Keyboard Controller Instruction Pointer (EIP, a.k.a. local buffer Program Counter) c = getchar(); (C-level code shown here; actual code in memory is machine code) c (memory storage for variable c) Memory I/O Operation Example (contd.) q To start the read operation, the CPU tells the controller: - How much data to transfer (e.g., one byte) - Where to place it in memory - Goes off to do something else q The device controller: - Checks local registers to determine what to do (read, write) - Transfers data from device to local buffer (or to memory, in case of a Direct Memory Access controller) - Informs the CPU when transfer is complete – HOW? HOW Does the CPU know when an I/O operation is ready? q Inefficient solution: Polling CPU ask device 1 device 2 device n ready? ready? . ready? HOW Does the CPU know when an I/O operation is ready? q Efficient solution: Hardware Interrupts - Device sends an interrupt to the CPU when ready - No overhead when no I/O requests pending CPU READY! device 1 device 2 . device n Hardware Interrupts q Each I/O device has a dedicated wire (interrupt line) to signal the CPU that the I/O operation is complete q Note that the CPU can enable/disable interrupts q What does the CPU do when an interrupt occurs? Handling Hardware Interrupts q When the CPU is interrupted - stops what it’s doing, saves its state - transfers control to an Interrupt Handler Routine • address of routine stored in the Interrupt Vector Table code for interrupt handler 0 Interrupt Vector Table code for Interrupt interrupt handler 1 number 0 1 2 code for ... interrupt handler 2 n-1 ... code for interrupt handler n-1 Recap: Handling Hardware Interrupts Recall: Multiprogramming Issue Process 1 q Processes share the CPU Process 2 - What if a program has infinite loops? Process 3 q Solution: Timer Interrupts - An internal timer generates interrupts periodically - The interval between timer interrupts is called time slice or scheduling quantum - When the timer interrupt occurs, the CPU switches to another process • this prevents the system being held up by processes in infinite loops Multiprogramming with Timer Interrupts I/O or Timer Interrupt I/O or Timer Interrupt I/O or Timer Interrupt . Timer Interrupts Example q Suppose P1, P2 and P3 are ready to run (in this order). P1 executes for 3 time units, P2 executes for 4 times units, and P3 executes for 2 time units. Neither process invokes I/O. Assuming that a timer interrupt occurs every time unit, fill in the table below: Time (in units) Running Queue of Processes Ready to Run 0+e P1 P2, P3 1+e 2+e 3+e 4+e 5+e 6+e 7+e 8+e Process States q Process States - (New) Process is being created - (Ready) Process is waiting its turn to use the CPU - (Running) Process is actively using the CPU - (Blocked) Process is waiting for I/O to complete or for some other event to happen - (Terminated) Process has finished execution Process State Transitions q State Transitions 1. Process created, placed into Ready queue 2. The OS has selected a process to run 3. Timer Interrupt: the process has used up its allotted time slice 4. I/O request or need to wait until a future event 5. I/O done or event occurred 6. Process has finished execution or has been terminated State Transition Example q Suppose P2, P3, P4 are in this order in the Ready Queue, and that the following sequence of events occurs: Time 5: P1 invokes read Time Running Ready Blocked Time 15: P2 invokes write 0+e P1 P2, P3, P4 5+e Time 20: Interrupt (P1's read complete) 15+e Time 30: P3 terminates 20+e Time 35: Interrupt (P2's write complete) 30+e Time 40: P4 terminates 35+e Time 45: P1 terminates 40+e 45+e Assume that processes are always appended at the end of a queue, and the first process in the queue is always scheduled. Fill in the table to show the process states after each event. Process Control Block (PCB) q Operating system data structure - maintains information associated with each process (context) (ready, running, blocked) (unique ID) (instruction register) (execution context – value of CPU registers) (valid memory addresses) Process Control Block CPU Switch From Process to Process Recap q A process is a program in execution q Multiprogramming refers to multiple processes running concurrently - Processes take turns using the CPU - CPU switches to a different process when an I/O request or a timer interrupt occurs q Hardware interrupts are signals issued by I/O devices to indicate that an I/O operation is complete - CPU checks for interrupts after every machine instruction - When an interrupt occurs, the CPU transfers control to an interrupt handling routine q Process Control Block - data structure used by the OS to track processes .