Escola d'Enginyeria Departament de Microelectrònica i Sistemes Electrònics Checkpointing for Virtual Platforms and SystemC-TLM-2.0 Memòria del treball de tesis del programa de Doctorat en Informàtica, opció microelectrònica, presentada per Màrius Montón i Macián i dirigida per Dr. Mark Burton i Dr. Jordi Carrabina i Bordoll Bellaterra, 10 de Novembre del 2010. To my parents and sister To Míriam Acknowledgements I would like to thank all the people who have helped and inspired me during my doctoral study these years. I especially want to thank Dr. Carrabina for the years working with him in CEPHIS at Universitat Autònoma de Barcelona. Dr. Burton and Dr. Jakob Engblom deserve special thanks for their guidance during work with them at GreenSocs. This thesis wouldn't be possible without them: thank you. Thanks also to the other GreenSocs staff, I've learned a lot from all of them. Very special thanks to Josep Cañadell. He was the student who started the technical work presented here as his Final Degree Project. Specially thank to CEPHIS guys, started by Borja, Willy & Toni and continuing with Marc, Aitor, Roger, Chak, Carlos, Edu, Héctor, and all the rest of the group. All of them deserves the same opportunities to get their PhD as I had. Also thank to my teaching colleagues Xavi Fitó, Lena, Quim, Elena Valderrama, Lluís Ribas, I learned a lot from them, I hope they get something from me some time. There are lot of people from UAB that I must be grateful to. Elena Garcia, Obi, Maria, Albert, Anna, Pilar, Toni Nuñez, Otto, Guille, thank you for the coffees, lunches, dinners, beers, inspiration, comments... VII I wish to thank everybody with whom I have shared experiences in life. From the people who first persuaded and got me interested in the study of informatics, especially those who also played a significant role in my life, to those who with the gift of their company made my days more enjoyable and worth living: Bosko, Roman, Marta, Manolo, Ben, Xavifú, Gemma, Héctor, Àlex, Chema, Sandra and other GTR people; inthenight nerds; Albert Guinart, Nadia, Albert Prats, Mónica... you probably don't understand any of this thesis, but it is done in great part thank to you. I cannot finish without saying how grateful I am with my family: grandparents, uncles, aunts and cousins and 'acoplaos' all have given me a loving environment in which to develop. I wish to thank my parents, Dolors and Faustí and my sister Núria. They have always supported and encouraged me to do my best in all matters of life. To them I dedicate this thesis. Of course, Míriam deserves a special line to herself. Without her patience, support and love, this work wouldn't have been completed. Thank you to my new family, I feel at home with them. Lastly, I offer my regards to all of those who supported me in any respect during the completion of the project and whom I may have forgotten in these acknowledgements. IX Abstract One advantage of using a virtual platform or virtual prototype over real hardware for embedded software development and testing is the ability of some simulators to take checkpoints of their state. If the entire system model is detailed enough, it might take several minutes (or even hours) to simulate booting the O.S. If a snapshot of the simulation is saved just after it has finished booting, each time it is necessary to run the embedded software, designers can simply restore the snapshot and go. Restarting a checkpoint typically takes a few seconds. This can translate into a major productivity gain, especially when working with embedded system with complex SW stacks and O.S. like modern embedded devices. In this dissertation we present in firstly our work on adding a description level language as SystemC to two Virtual Platforms. This work was done for a commercial Virtual Platform, and later translated to a open-sourced Platform. This thesis also presents a set of modifications to SystemC language to support checkpointing. These modifications will make it possible to take the state of a SystemC running simulation and save it to disk. Later, the same simulation can be restored to the same point it was before, without any change to the simulated modules. These changes would help SystemC to be suitable for use by Virtual Platforms as a description language. Finally, we discuss and propose some other alternatives to enhance SystemC in the integration to Virtual Platform and to other EDA tools. XI Contents ACKNOWLEDGEMENTS........................................................VII ABSTRACT...........................................................................IX LIST OF FIGURES..............................................................XVII INDEX OF TABLES..............................................................XIX 1 INTRODUCTION.................................................................23 1.1 OBJECTIVES.......................................................................25 1.2 CONTRIBUTIONS...................................................................25 1.3 STRUCTURE OF THE DISSERTATION................................................26 2 STATE OF THE ART............................................................29 2.1 SYSTEMC.........................................................................29 2.2 TLM-2...........................................................................30 2.2.1 TRANSPORT INTERFACES.............................................................................33 2.2.2 CODING STYLES.....................................................................................35 2.2.3 TEMPORAL DECOUPLING.............................................................................36 2.2.4 DIRECT MEMORY INTERFACE.......................................................................37 2.3 VIRTUAL PLATFORMS.............................................................38 2.3.1 INSTRUCTION SET SIMULATORS.....................................................................39 2.3.2 CURRENT TOOLS.....................................................................................40 2.4 SYSTEMC AND VIRTUAL PLATFORMS.............................................48 2.5 CHECKPOINTING...................................................................49 2.6 CHECKPOINTING IN VIRTUAL PLATFORMS.........................................51 3 VIRTUAL PLATFORMS AND SYSTEMC..................................55 3.1 QEMU-SC.......................................................................55 3.1.1 MOTIVATION..........................................................................................55 3.1.2 ARCHITECTURE.......................................................................................56 3.1.3 IMPLEMENTATION.....................................................................................59 3.1.4 RESULTS..............................................................................................63 XIII 3.2 VIRTUTECH SIMICS BRIDGE.......................................................69 3.2.1 ARCHITECTURE.......................................................................................69 3.2.2 IMPLEMENTATION.....................................................................................71 3.2.3 RESULTS..............................................................................................73 3.3 QBOX............................................................................75 3.3.1 ARCHITECTURE.......................................................................................76 3.3.2 IMPLEMENTATION.....................................................................................77 3.3.3 RESULTS..............................................................................................79 4 CHECKPOINTING FOR SYSTEMC & TLM-2.............................83 4.1 MOTIVATION......................................................................83 4.2 RELATED WORK..................................................................83 4.3 DESIGN AND IMPLEMENTATION...................................................85 4.3.1 MODEL REQUIREMENTS..............................................................................86 4.3.2 SYSTEMC KERNEL....................................................................................88 4.3.3 FSM.................................................................................................97 4.4 RESULTS..........................................................................99 4.4.1 SC_THREAD TO SC_METHOD OVERHEAD..............................................101 4.4.2 SYSTEMC CHECKPOINT SUPPORT OVERHEAD.....................................................101 4.4.3 CHECKPOINT SIZE..................................................................................103 4.4.4 VALIDATING CHECKPOINTING......................................................................105 4.4.5 VALIDATING MODEL UPDATES....................................................................106 4.4.6 COMPLETENESS OF CHECKPOINTABLE SYSTEMC SUBSET........................................107 4.4.7 SIMULATION SPEED OF THE CHECKPOINTABLE OSCI KERNEL..................................109 4.5 LIMITATIONS AND DISCUSSION..................................................109 5 DISCUSSION AND CONCLUSIONS......................................113 5.1 DISCUSSION.....................................................................113 5.2 CONCLUSIONS...................................................................114 5.3 IMPACT OF THE QEMU & SYSTEMC..........................................116 CURRICULUM