A Serial Bitstream Processor for Smart Sensor Systems by Xin Cai Department of Electrical and Computer Engineering Duke University Date: Approved: Martin Brooke, Advisor Hisham Massoud Richard Fair Patrick Wolf Dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in the Department of Electrical and Computer Engineering in the Graduate School of Duke University 2010 Abstract (Electrical and Computer Engineering) A Serial Bitstream Processor for Smart Sensor Systems by Xin Cai Department of Electrical and Computer Engineering Duke University Date: Approved: Martin Brooke, Advisor Hisham Massoud Richard Fair Patrick Wolf An abstract of a dissertation submitted in partial fulfillment of the the degree of Doctor of Philosophy in the Department of Electrical and Computer Engineering in the Graduate School of Duke University 2010 Copyright c 2010 by Xin Cai All rights reserved except the rights granted by the Creative Commons Attribution-Noncommercial Licence Abstract A full custom integrated circuit design of a serial bitstream processor is proposed for remote smart sensor systems. This dissertation describes details of the architectural exploration, circuit implementation, algorithm simulation, and testing results. The design is fabricated and demonstrated to be a successful working processor for basic algorithm functions. In addition, the energy performance of the processor, in terms of energy per operation, is evaluated. Compared to the multi-bit sensor processor, the proposed sensor processor provides improved energy efficiency for serial sensor data processing tasks, and also features low transistor count and area reduction advantages. Operating in long-term, low data rate sensing environments, the serial bitstream processor developed is targeted at low-cost smart sensor systems with serial I/O communication through wireless links. This processor is an attractive option because of its low transistor count, easy on-chip integration, and programming flexibility for low data duty cycle smart sensor systems, where longer battery life, long-term monitoring and sensor reliability are critical. The processor can be programmed for sensor processing algorithms such as delta sigma processor, calibration, and self-test algorithms. It also can be modified to uti- lize Coordinate Rotation Digital Computer (CORDIC) algorithms. The applications of the proposed sensor processor include wearable or portable biomedical sensors for health care monitoring or autonomous environmental sensors. iv To my father Jiahe Cai, my mother Xiuqin Lv, my brother and sister for their endless love, support and encouragement through the years To my husband Fang Feng, who is always there for me v Contents Abstract iv List of Tables xi List of Figures xiii 1 Introduction 1 1.1 Proposed Bitstream Processor .............. 5 1.2 Objective ......................... 8 1.3 Innovative Method .................... 8 1.4 Broader Impacts ..................... 9 1.5 Dissertation Organization ................ 9 2 Background 11 2.1 Smart Sensor Systems .................. 11 2.1.1 Sensors ....................... 12 2.1.2 Delta-Sigma Analog-to-Digital Modulation ... 13 2.1.3 Sensor Processors ................. 15 2.1.4 Wireless Link ................... 17 2.1.5 Power Supply ................... 17 vi 2.1.6 Serial Interface .................. 18 2.1.7 Memory ...................... 19 2.2 Sensor System Design Issues ............... 20 2.2.1 Cost Analysis ................... 21 2.2.2 Area Analysis ................... 22 2.2.3 Energy Efficiency ................. 23 2.3 Turing Machine ...................... 24 3 Architecture and Algorithm 29 3.1 Bitstream Processor for General Purpose Computation 32 3.1.1 Bitstream Processor I Architecture ....... 32 3.1.2 Modules Description ............... 33 3.2 Bitstream Processor for Delta-Sigma Digital Processing 38 3.2.1 Comb Filter .................... 38 3.2.2 FIR Digital Filter ................. 40 3.3 Bitstream Processor for Calibration ........... 42 3.3.1 Sensor Calibration ................ 42 3.3.2 Point Calibration Method ............ 45 3.3.3 Multivariate Calibration Method ........ 46 3.4 Bitstream Processor for Self Test ............ 52 3.4.1 Sensor Self-Test Techniques ........... 52 3.4.2 Bitstream Processor II Architecture ....... 53 3.4.3 Semi-digital Filter ................ 57 vii 3.4.4 Delta-Sigma DAC ................. 58 3.5 Bitstream Processor for CORDIC Algorithm ...... 64 3.5.1 The Original CORDIC Algorithm ........ 64 3.5.2 Modified Bit-serial CORDIC Algorithm ..... 67 3.5.3 CORDIC Bitstream Processor III Architecture .70 3.5.4 CORDIC Instruction Set ............. 71 4 Design and Simulation 74 4.1 Evaluation Metrics .................... 75 4.1.1 Energy Dissipation Model for Sensor Nodes .. 75 4.1.2 Processor Performance Evaluation Metrics ... 75 4.2 Essential Component Modules .............. 77 4.2.1 One-bit FA .................... 77 4.2.2 One-bit ALU ................... 79 4.2.3 D Flip-Flop .................... 84 4.2.4 Shift Register ................... 86 4.2.5 Instruction Register ................ 87 4.2.6 Performance Evaluation Metrics ......... 88 4.3 Bitstream Processor I ................... 90 4.3.1 Processor Design ................. 90 4.3.2 Performance Evaluation Metrics ......... 90 4.3.3 Instruction Set .................. 92 4.4 Bitstream Processor II .................. 94 viii 4.4.1 Processor Design ................. 94 4.4.2 Performance Evaluation Metrics. ........ 97 4.4.3 Instruction Set .................. 97 5Test 100 5.1 Chip Test Procedure ................... 100 5.2 Energy and Power Consumption Equations ....... 105 5.3 Various Effects on Test .................. 107 5.3.1 ESD Effect .................... 108 5.3.2 Probe Effect .................... 110 5.3.3 Supply Voltage Effect ............... 111 5.3.4 Clock Frequency Effect .............. 113 5.3.5 Signal Switching Frequency Test ......... 116 5.4 Bitstream Processor Test ................. 117 5.4.1 Shift Register ................... 117 5.4.2 ALU ........................ 119 5.4.3 Basic Operation Test ............... 120 5.4.4 Algorithm Test .................. 123 5.5 Analysis of Energy Consumption ............ 126 5.5.1 Leakage Energy .................. 126 5.5.2 Switching Energy ................. 127 5.5.3 Total Energy per Operation ........... 129 6Conclusion 132 ix 6.1 Design Comparison and Discussion ........... 132 6.1.1 Bitstream vs. Multi-bit Processing ....... 132 6.1.2 Area ........................ 133 6.1.3 Energy Consumption ............... 134 6.1.4 Self-Test ...................... 135 6.1.5 General Purpose Computing ........... 135 6.1.6 Quantitative Comparison ............. 136 6.1.7 Case Studies on Sensor Applications ...... 137 6.1.8 Design Pros and Cons .............. 140 6.2 Contributions and Future Works ............. 141 6.3 Conclusion ......................... 145 A Additional Circuits 148 A.1 First Order Δ-Σ ADC .................. 148 A.2 Semi-Digital Filter .................... 150 BMatlabCODE 155 C Verilog CODE 168 DHSPICECODE 183 Bibliography 189 Biography 200 x List of Tables 2.1 Examples of WSN Sensor Nodes. ............ 16 2.2 Serial Interface Comparison. ............... 19 3.1 One-dimensional Calibration Method. .......... 46 3.2 CORDIC Computation Functions. ............ 66 3.3 Instruction Set for CORDIC Processor ......... 73 4.1 ALU IR Control Bits. ................... 81 4.2 ALU Logical Operation Truth Table. .......... 81 4.3 ALU Arithmetic Operation Truth Table. ........ 81 4.4 Performance Evaluation Metrics. ............ 90 4.5 Bitstream Processor I: Performance Evaluation Metrics. 90 4.6 Bitstream Processor I: IR Control Bit Definition. ... 93 4.7 Bitstream Processor I: Instruction Set. ......... 94 4.8 Bitstream Processor II: Performance Evaluation Metrics. 96 4.9 Bitstream Processor II: Opcode. ............. 98 4.10 Bitstream Processor II: Basic Instruction. ........ 99 4.11 Bitstream Processor II: Special Instruction. ....... 99 5.1 Bitstream Processor II: Algorithm Processing Time. 123 xi 5.2 Bitstream Processor II: Algorithms. ........... 124 6.1 Energy Comparison of Three Architectures. ...... 137 A.1 Semidigital Filter Coefficients. .............. 152 xii List of Figures 1.1 Smart Sensor Systems-On-Chip. ............. 2 1.2 Comparison of Two Sensor Processor Architectures. .. 3 1.3 Conventional Wireless Smart Sensor System. ...... 5 1.4 Proposed Wireless Smart Sensor System. ........ 7 2.1 Signal Processing Chain of a Traditional Sensor System. 12 2.2 A First Order Δ-Σ ADC. ................. 14 2.3 CMOS IC Costs Time Line. ............... 21 2.4 Moore’s Law of Intel Microprocessors. .......... 23 2.5 One Auxiliary-Work-Tape Turing Machine. ....... 26 2.6 TM Transition Diagram. ................. 27 3.1 Block Diagram of a FIR Filter. ............. 30 3.2 Block Diagram of a Bitstream Processor. ........ 31 3.3 Block Diagram of Sensor Bitstream Processor I. .... 33 3.4 Architectural Diagram of Sensor Bitstream Processor I. 34 3.5 Block Diagram of a Second Order Comb Filter. .... 39 3.6 Comb2 Frequency Response. ............... 39 3.7 Comb2 Matlab Simulation. ................ 40 xiii 3.8 Block Diagram of a FIR Filter. ............. 41 3.9 FIR Filter Frequency Response. ............. 42 3.10 Chemometrics Calibration Flow Chart. ......... 47 3.11 Chemometrics Multivariate Calibration Methods. ... 48 3.12 Block Diagram of Sensor Node Processor II. ...... 55 3.13 Sensor Node Processor II for Self-Test. ......... 56 3.14 Semi-digital Reconstruction Filter. ........... 58 3.15